WAFER LEVEL PACKAGING

• US 20080211113A1
• Filed: 05/13/2008
• Published: 09/04/2008
• Est. Priority Date: 06/14/2002
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Neo, Yong Loo, Boon, Suan Jeung, Chua, Swee Kwang, Chia, Yong Poo
• Granted Patent: US 7,820,484 B2
• Time in Patent Office: Days
• US Class Current: 257/782
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/02371 connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/13024 the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/9202 Forming additional connectors after the connecting process
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures

Abstract

Through vias in a substrate are formed by creating a trench in a top side of the substrate and at least one trench in the back side of the substrate. The sum of the depths of the trenches at least equals the height of the substrate. The trenches cross at intersections, which accordingly form the through vias from the top side to the back side. The through vias are filled with a conductor to form contacts on both sides and the edge of the substrate. Contacts on the backside are formed at each of the trench. The through vias from the edge contacts. Traces connect bond pads to the conductor in the through via. Some traces are parallel to the back side traces. Some traces are skew to the back side traces. The substrate is diced to form individual die.

Claims

1. A method of forming contacts for an integrated circuit, comprising:

providing a substrate with at least one integrated circuit;

forming a first trench in the top side of the substrate;

forming a second trench in the back side of the substrate so that the second trench crosses the first trench to form a through via;

inserting a conductor in the through via to form an electrical contact on both the top side and the back side;

positioning a bond pad on the top side; and

connecting the bond pad to the conductor.

2. The method of claim 1, wherein positioning the bond pad includes positioning the bond pad directly above the second trench, and wherein connecting the bond pad to the conductor includes forming a trace, which is parallel to the second trench, on the substrate.

3. The method of claim 1, wherein positioning the bond pad includes positioning the bond pad not directly above the second trench, and wherein connecting the bond pad to the conductor includes forming a trace, which is skew to the second trench, on the substrate.

4. A method of forming contacts for an integrated circuit, comprising:

providing a substrate with at least one integrated circuit;

forming a first trench in the top side of the substrate;

forming a second trench in the back side of the substrate so that the second trench crosses the first trench to form a through via;

inserting a conductor in the through via to extend from the top side to the back side;

positioning a bond pad on the top side;

connecting the bond pad to the conductor; and

forming a back side contact, which is connected to the conductor, at one end of the second trench.

5. The method of claim 4, wherein forming the first trench includes mechanically cutting the top side of the substrate to a depth that is at least half the thickness of the substrate and less than the thickness of the substrate.

6. The method of claim 5, wherein forming the second trench includes mechanically cutting the back side of the substrate to a depth that is at least half the thickness of the substrate and less than the thickness of the substrate.

7. A method of forming contacts for an integrated circuit, comprising:

providing a substrate with at least one integrated circuit;

forming a first trench in the top side of the substrate;

forming a second trench in the back side of the substrate so that the second trench crosses the first trench to form a through via;

inserting a conductor in the through via to extend from the top side to the back side;

positioning a bond pad on the top side;

connecting the bond pad to the conductor;

forming a back side contact, which is connected to the conductor, at one end of the second trench; and

backgrinding the back side of the substrate so that the back side is essentially coplanar to the back side contact.

8. The method of claim 7, wherein forming the first trench includes mechanically cutting the top side of the substrate to a depth that is at least half the thickness of the substrate and less than the thickness of the substrate.

9. The method of claim 8, wherein forming the second trench includes mechanically cutting the back side of the substrate to a depth that is at least half the thickness of the substrate and less than the thickness of the substrate.

10. The method of claim 8, wherein providing the substrate includes providing a memory device.

11. A method of forming a substrate level package of two integrated circuit devices, comprising:

providing a first substrate including a plurality of first integrated circuit devices separated by streets;

forming first trenches in the streets on a top side of the first substrate;

forming second trenches on the backside of the first substrate so that the second trenches and first trenches intersect to form through vias from the top side to the backside of the first substrate;

inserting a conductor into the through vias to form contacts on the top side and the backside;

connecting the conductor to at least one of the plurality of first integrated circuit devices;

providing a second substrate including a plurality of second individual integrated circuit devices separated by streets;

connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices; and

separating connected pairs of the connected first integrated circuit devices and second integrated circuit devices from the other pairs of connected first integrated circuit devices and second integrated circuit devices.

12. The method of claim 11, wherein providing a second substrate includes forming third trenches in the streets on a top side of the second substrate;

forming fourth trenches on the backside of the second substrate so that the third and fourth trenches intersect to form through vias from the top side to the backside of the second substrate;

inserting a conductor into the through vias to form contacts on the top side and the backside; and

connecting the conductor to at least one of the plurality of second integrated circuit devices.

13. The method of claim 12, wherein forming the third trench includes forming the third trench to a depth of over half the thickness of the second substrate, and wherein forming the fourth trenches includes forming the fourth trench to a depth of over half the thickness of the second substrate.

14. The method of claim 13, wherein forming the fourth trenches includes forming a plurality of fourth trenches beneath at least one of the second integrated circuit devices.

15. The method of claim 14, wherein the fourth trenches are linear.

16. The method of claim 12, wherein forming the first trench includes forming the first trench to a depth of over half the thickness of the first substrate, and wherein forming the second trenches includes forming the second trench to a depth of over half the thickness of the first substrate.

17. The method of claim 16, wherein forming the second trenches includes forming a plurality of second trenches beneath at least one of the second integrated circuit devices and each of the plurality of second trenches intersects the first trench.

18. The method of claim 17, wherein the second trenches are linear.

19. The method of claim 12, wherein connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes aligning dies in the first substrate with dies in the second substrate and connecting bond pads of the die on the first substrate to bond pads of the die on the second substrate.

20. The method of claim 12, wherein separating connected pairs of the connected first integrated circuit devices and second integrated circuit devices includes simultaneously dicing the first substrate and the second substrate into pairs of dies that are connected at the respective bond pads.

21. The method of claim 20, wherein connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes backgrinding the joined first substrate and the second substrate.

22. A method of forming a substrate level package of two integrated circuit devices, comprising:

providing a first substrate including a plurality of first dies separated by streets, the first dies including bond pads on an active side of the substrate and traces connected to the bond pads;

forming first trenches in the streets on a top side of the first substrate;

forming second trenches on the backside of the first substrate so that the second trenches and first trenches intersect to form through vias from the top side to the backside of the first substrate;

inserting a conductor into the through vias to form contacts on the top side and the backside;

connecting the conductor to at least one of the bond pads using one of the traces;

providing a second substrate including a plurality of second individual integrated circuit devices separated by streets;

connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices; and

separating connected pairs of the connected first integrated circuit devices and second integrated circuit devices from the other pairs of connected first integrated circuit devices and second integrated circuit devices.

23. The method of claim 22, wherein forming second trenches on the backside includes forming second trenches parallel to traces.

24. The method of claim 23, wherein forming the second trenches includes forming the second trenches essentially perpendicular to respective ones of the through vias.

25. The method of claim 24, wherein forming the second trenches includes mechanically cutting the backside of the substrate.

26. The method of claim 22, wherein providing the first substrate includes providing a wafer having a plurality of memory devices.

27. The method of claim 22, wherein providing a second substrate includes

providing a plurality of second dies separated by streets, the second dies including bond pads on an active side of the second substrate and second traces connected to the bond pads;

forming third trenches in the streets on a top side of the second substrate;

forming fourth trenches on the backside of the second substrate so that the third and fourth trenches intersect to form through vias from the top side to the backside of the second substrate;

inserting a conductor into the through vias of the second substrate to form contacts on the top side and the backside of the second substrate; and

connecting the conductor of the second substrate to at least one of the bond pads of the second substrate using the second traces.

28. The method of claim 27, wherein the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes connecting the traces of the first substrate to traces of the second substrate.

29. The method of claim 27, wherein the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes connecting the bond pads of the first substrate to bond pads of the second substrate.

30. The method of claim 27, wherein forming fourth trenches on the backside includes forming fourth trenches parallel to respective traces of the second substrate.

31. The method of claim 27, wherein forming the fourth trenches includes forming the fourth trenches essentially perpendicular to respective ones of the through vias of the second substrate.

32. The method of claim 31, wherein forming the fourth trenches includes mechanically cutting the backside of the second substrate.

33. The method of claim 27, wherein providing the second substrate includes providing a wafer having a plurality of memory devices.

34. A method of forming a substrate level package of two integrated circuit devices, comprising:

providing a first substrate including a plurality of first integrated circuit devices separated by streets;

forming first trenches in the streets on a top side of the first substrate;

forming second trenches on the backside of the first substrate so that the second trenches and first trenches intersect to form through vias from the top side to the backside of the first substrate;

inserting a conductor into the through vias to form contacts on the top side and the backside;

connecting the conductor to at least one of the plurality of first integrated circuit devices;

providing a second substrate including a plurality of second individual integrated circuit devices separated by streets;

connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices;

separating connected pairs of the connected first integrated circuit devices and second integrated circuit devices from the other pairs of connected first integrated circuit devices and second integrated circuit devices;

encapsulating a pair of the connected first integrated circuit device and second integrated circuit device; and

providing contacts to the pair of the connected first integrated circuit device and second integrated circuit device at the backside of one of the pair.

35. The method of claim 34, wherein connecting includes aligning the active side of the first substrate to the active side of the second substrate.

36. The method of claim 35, wherein connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes connecting bond pads of the second substrate to bond pads of the first substrate.

37. The method of claim 34, wherein connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes connecting traces of the second substrate to traces of the first substrate.

38. The method of claim 34, wherein connecting the plurality of second integrated circuit devices to the first plurality of integrated circuit devices includes connecting the conductors in the through vias of the second substrate to conductors in the through vias of the first substrate.

39. A method for joining dies of a first substrate to dies of a second substrate, comprising:

providing a plurality of first dies separated by saw streets on the first substrate;

providing a plurality of second dies separated by saw streets on the second substrate;

forming through vias the first substrate;

placing a conductor in the through vias;

connecting the conductor in the through vias to integrated circuits of the first substrate;

forming contacts on the backside of the first substrate connected to the conductor;

aligning the saw streets of the first substrate with the saw streets of the second substrate;

connecting a first die with a second die that is aligned active side to active side with the first die; and

separating the connected first die and second die from a remainder of the first and second substrates.

40. The method of claim 39, wherein separating includes cutting the first and second substrates along the aligned saw streets.

41. The method of claim 40, wherein cutting includes laser cutting.

42. The method of claim 40, wherein cutting includes cutting with a saw blade.

43. The method of claim 40, wherein cutting includes cutting with a water jet.

44. The method of claim 39, wherein forming through vias includes forming a first trench in the saw streets in a first direction and forming a plurality of second trenches on the backside of the first substrate in a second direction so that the first trench intersects the second trenches to form the through vias.

45. The method of claim 44, wherein forming the first trench includes mechanically cutting the saw streets.

46. The method of claim 45, wherein forming the second trenches includes mechanically cutting the backside of the first substrate directly beneath the first dies.

47. The method of claim 44, wherein forming contacts on the backside of the first substrate includes forming contacts in the second trenches.

48. The method of claim 47, wherein forming contacts includes backgrinding the first substrate to form a back surface substantially planar to the contacts in the second trenches.

49. A die, comprising:

a substrate;

an active area on the substrate;

an insulation layer on the active area;

first and second bond pads on the insulation layer and electrically connected to the active area;

a first contact;

a second contact;

a first trace connecting the first bond pad to the first contact; and

a second trace connecting the second bond pad to the second contact, the second trace being nonparallel to the first trace.

50. The die of claim 49, wherein the second trace is coplanar with the first trace.

51. The die of claim 49, wherein the first trace is linearly aligned with the second contact and the first contact.

52. The die of claim 51, wherein the first trace is enlongate.

53. The die of claim 49, wherein the first trace is linearly aligned with the first contact and the first bond pad.

54. The die of claim 53, wherein the first trace is enlongate.

55. The die of claim 49, wherein the first trace and the second trace are not connected.

56. The die of claim 49, wherein the active area includes a memory device.

57. The die of claim 49, wherein the active area includes a memory device and a logic device.

58. A die, comprising:

a substrate having a first edge and a second edge opposite the first edge;

an active area on the substrate;

a first recess in the first edge;

a first contact in the first recess;

a second recess in the second edge;

a second contact in the second recess;

a first bond pad on the substrate and electrically connected to the active area;

a second bond pad on the substrate and electrically connected to the active area;

a first trace connecting the first bond pad to the first contact; and

a second trace connecting the second bond pad to the second contact.

59. The die of claim 58, wherein the first recess extends from a top surface of the substrate to a back surface of the substrate.

60. The die of claim 59, wherein the first contact extends from the top surface of the substrate to the back surface of the substrate so that electrical connection to the active area can be made from either the top surface or the back surface.

61. The die of claim 60, wherein the first contact is open at the first edge so that electrical connection to the active area can be made from the first edge.

62. A die, comprising:

a substrate;

a plurality of bond pads on the substrate;

a plurality of pairs of contacts on the substrate, wherein a first contact of the pairs is linearly aligned in a first direction with a second contact of the pair and a first bond pad of the plurality of bond pads;

a first trace connecting the first contact to the first bond pad; and

a second trace connecting a second bond pad of the plurality of bond pads to the second contact.

63. The die of claim 62, wherein the first trace is linearly aligned with the first bond pad and the first edge contact.

64. The die of claim 63, wherein the second bond pad is offset from the first bond pad in a second direction that is different than the first direction.

65. The die of claim 64, wherein the plurality of pairs of contacts include edge contacts.

66. The die of claim 65, wherein the plurality of pairs of contacts include back contacts.

67. The die of claim 66, wherein the plurality of pairs of contacts include top contacts.