Driving apparatus for an OLED panel

• US 20080211793A1
• Filed: 01/09/2008
• Published: 09/04/2008
• Est. Priority Date: 01/12/2007
• Status: Abandoned Application

• Current Assignee: Richtek Technology Corporation (MediaTek, Inc.)
• Original Assignee: Richtek Technology Corporation (MediaTek, Inc.)
• Inventors: Ku, Chiung-Ching
• Application Number:
  US12/007,272
• Publication Number:
  US 20080211793A1
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2310/0208 using active addressing
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/3216 using a passive matrix

Abstract

A driving apparatus for an OLED panel comprises a common timing controller with a multi-line addressing algorithm and a segment controller with the multi-line addressing algorithm, to control a common driver and a segment driver, respectively, to drive the OLED panel. The common driver and the segment driver are connected to common lines and segment lines of the OLED panel, respectively. According to the multi-line addressing algorithm, the common driver can select at least two of the common lines at a same time.

Claims

1. A driving apparatus for an OLED panel having a plurality of segment lines and a plurality of common lines, the driving apparatus comprising:

a segment driver connected to the plurality of segment lines;

a segment controller with a multi-line addressing algorithm, for controlling the segment driver to select the plurality of segment lines;

a common driver connected to the plurality of common lines; and

a common timing controller with the multi-line addressing algorithm, for controlling the common driver to select the plurality of common lines, such that the common driver can select at least two of the plurality of common lines at a same time.

2. The driving apparatus of claim 1, wherein the segment driver comprises a plurality of current sources, each connected to one of the plurality of segment lines.

3. The driving apparatus of claim 1, wherein the common driver comprises a sink DA controller for providing a plurality of common signals to select the plurality of common lines according to a control signal provided by the common timing controller.

4. The driving apparatus of claim 3, wherein the sink DA controller limits currents flowing through the plurality of common lines according to the control signal provided by the common timing controller.

5. The driving apparatus of claim 3, wherein the common driver further comprises a plurality of switches controlled by the sink DA controller, each of the plurality of switches connected to one of the plurality of common lines.

6. The driving apparatus of claim 5, wherein the sink DA controller comprises:

a plurality of digital-to-analog converters, each connected to one of the plurality of switches for limiting a current therethrough, according to the control signal provided by the common timing controller; and

a logic circuit for switching the plurality of switches according to the control signal provided by the common timing controller.

7. The driving apparatus of claim 6, wherein the sink DA controller further comprises a protector for detecting the currents flowing through the plurality of switches to determine whether or not to disable the plurality of digital-to-analog converters.