SCALABLE SYSTEM FOR WIDE AREA SURVEILLANCE

• US 20080211915A1
• Filed: 02/21/2008
• Published: 09/04/2008
• Est. Priority Date: 02/21/2007
• Status: Active Grant

• Current Assignee: Pixel Velocity Incorporated
• Original Assignee: Pixel Velocity Incorporated
• Inventors: McCubbrey, David L.
• Granted Patent: US 8,587,661 B2
• Time in Patent Office: Days
• US Class Current: 348/159
• CPC Class Codes: G08B 13/19608 Tracking movement of a target, e.g. by detecting an object predefined as a target, using target direction and or velocity to predict its new position
• CPC Class Codes: G08B 13/19641 Multiple cameras having overlapping views on a single scene
• CPC Class Codes: H04N 7/181 for receiving images from a plurality of remote sources

Abstract

According to one embodiment, a controller for a surveillance system includes ports for coupling a camera, synchronization logic blocks coupled to the ports, an information aggregation logic block coupled to the camera ports, and an output port coupled to the information aggregation logic block. According to another embodiment, a method of scaling a surveillance system includes synchronizing a plurality of cameras, capturing images from the synchronized cameras, aggregating at least two processed synchronized images, and processing the aggregated synchronized images.

Claims

1. A controller for a surveillance system, comprising:

a first port for coupling a camera;

a second port for coupling a camera;

a first synchronization logic block coupled to the first port;

a second synchronization logic block coupled to the second port;

an information aggregation logic block coupled to the camera ports; and

an output port coupled to the information aggregation logic block.

2. The system of claim 1, further comprising an image sharing logic block coupled to the synchronization logic block of the first port and the synchronization logic block of the second port;

and an image pair-processing logic block coupled to the image sharing logic block and coupled to the information aggregation logic block.

3. The controller of claim 1, further comprising a synchronization controller coupled to the synchronization logic blocks.

4. A system for surveillance, comprising;

a first controller according to the controller of claim 1;

a second controller according to the controller of claim 1;

a communication channel coupled to the controllers; and

a chassis supporting the controllers.

5. The system of claim 4, wherein an output of the image sharing logic block coupled to the first port on the first controller is coupled to an image sharing logic block connecting to the first port on the second controller.

6. The system of claim 4, wherein a synchronization logic block on the first controller is coupled to a synchronization logic block on the second controller.

7. The system of claim 4, wherein the communication channel is one selected from the group consisting of PCI-Express and IEEE 1394.

8. The system of claim 6, further comprising a synchronization controller coupled to the synchronization service logic block of the first controller.

9. The system of claim 8, further comprising a synchronization channel in the communication channel, wherein the synchronization channel on the communication channel is coupled to at least two synchronization logic blocks on a controller.

10. The system of claim 4, further comprising a processor connected to the communication channel.

11. A network of systems for surveillance, comprising;

a first system according to the system of claim 4;

a second system according to the system of claim 4; and

a communication channel coupling the first system and the second system.

12. The system of claim 11, further comprising a low latency switch coupled to the first system and the second system.

13. The system of claim 11, further comprising a synchronization controller.

14. The system of claim 11, further comprising a processor coupled to the communication channel.

15. The system of claim 11, further comprising a plurality of cameras connected to the camera ports on the controllers.

16. The system of claim 15, wherein two of the plurality of cameras have at least partially overlapping fields of view.

17. A method comprising:

synchronizing a plurality of cameras;

capturing images from the synchronized cameras;

aggregating information from at least two synchronized images; and

processing the aggregated information.

18. The method of claim 17, further comprising the step of distributing synchronized images from at least two cameras to a processor.

19. The method of claim 18, further comprising the step of processing the synchronized image pairs.

20. The method of claim 17, wherein the step of synchronizing a plurality of cameras includes providing a continuous source for isochronous cycle start times.

21. The method of claim 20, wherein the step of synchronizing a plurality of cameras includes setting a global time to provide consistent values for the bus_time and cycle_time registers on a communication channel.

22. The method of claim 18, wherein the step of processing the aggregated processed synchronized images includes one application selected from the group consisting of combining optical images with thermal images to produce thermal signature verified images, combining images to create a 3-dimensional image, and tracking objects across multiple camera fields of view.

23. A network of systems for surveillance, comprising:

at least two subsystems, wherein each subsystem includes;

at least two controllers for a surveillance system wherein each controller includes a first port for coupling a camera, a second port for coupling a camera, a first synchronization logic block coupled to the first port, a second synchronization logic block coupled to the second port, an image sharing logic block coupled to the synchronization logic block of the first port and the synchronization logic block of the second port, an image pair-processing logic block coupled to the image sharing logic block, an information aggregation logic block coupled to the output of the image pair-processing logic block, and an output port coupled to the information aggregation logic block;

a communication channel coupled to the output port of the controllers; and

a chassis supporting the controllers;

a low latency switch coupled to the first system and the second system;

a processor coupled to the communication channel; and

a synchronization controller coupled to a synchronization channel on the communication channel coupled to at least two synchronization logic blocks on a controller, wherein the synchronization controller outputs a continuous source for isochronous cycle start times onto the synchronization channel.

24. The system of claim 23, further comprising a plurality of cameras connected to the camera ports on the controllers.

25. The system of claim 24, wherein two of the plurality of cameras have at least partially overlapping fields of view.