Treating a liner layer to reduce surface oxides

• US 20080213994A1
• Filed: 03/01/2007
• Published: 09/04/2008
• Est. Priority Date: 03/01/2007
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Cheng, Chin-Chang, Simka, Harsono, Chebiam, Ramanan, Whitney, Damian
• Granted Patent: US 7,470,617 B2
• Time in Patent Office: Days
• US Class Current: 438/643
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76861 Post-treatment or after-treatment not introducing additional chemical elements into the layer
• CPC Class Codes: H01L 21/76864 Thermal treatment
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 2221/1089 Stacks of seed layers

Abstract

In one embodiment, the present invention includes a method for depositing a barrier layer on a substrate having a trench, depositing a liner layer on the barrier layer that includes a surface oxide, electrolessly depositing a copper seed layer on the liner layer, where the surface oxide is reduced in-situ in an electroless bath, depositing a bulk metal layer on the copper seed layer. Other embodiments are described and claimed.

Claims

1. A method comprising:

depositing a barrier layer on a substrate having a trench;

depositing a liner layer on the barrier layer, wherein the deposited liner layer includes a surface oxide;

electrolessly depositing a copper seed layer on the liner layer, wherein the surface oxide is reduced in-situ in an electroless bath; and

using an electroplating process to deposit a bulk metal layer on the copper seed layer.

2. The method of claim 1, wherein the liner layer comprises ruthenium and the surface oxide comprises ruthenium oxide.

3. The method of claim 1, wherein the barrier layer comprises at least one of tantalum nitride and titanium nitride.

4. The method of claim 1, wherein the ruthenium layer is deposited using one of a physical vapor deposition process, a chemical vapor deposition process, or an atomic layer deposition process.

5. The method of claim 1, further comprising annealing the copper seed layer prior to using the electroplating process to deposit the bulk metal layer.

6. The method of claim 1, wherein the electroless bath includes a wetting surfactant.

7. The method of claim 6, wherein the electroless bath includes at least one scavenger to reduce oxygen or hydrogen concentration.

8. The method of claim 1, further comprising planarizing the deposited layers to complete fabrication of a metal interconnect.

9. The method of claim 1, wherein the bulk metal layer comprises copper or a copper rich alloy.

10-15. -15. (canceled)

16. A method comprising:

depositing a liner layer wherein the deposited liner layer includes a surface oxide;

reducing the surface oxide in situ in an electroless bath; and

depositing a copper seed layer on said liner layer in said electroless bath.

17. The method of claim 16 including depositing a baffler layer on a substrate having a trench before depositing said liner layer.

18. The method of claim 17 including depositing a bulk metal layer on said copper seed layer.

19. The method of claim 16 wherein depositing a liner layer includes depositing ruthenium.