SEMICONDUCTOR DEVICE

• US 20080214132A1
• Filed: 10/05/2007
• Published: 09/04/2008
• Est. Priority Date: 10/17/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KUROKAWA, Yoshiyuki
• Granted Patent: US 7,881,693 B2
• Time in Patent Office: Days
• US Class Current: 455/272
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07767 the first and second communication means being two different antennas types, e.g. dipole and coil type, or two antennas of the same kind but operating at different frequencies
• CPC Class Codes: G11C 5/142 Contactless power supplies, e.g. RF, induction, or IR
• CPC Class Codes: H02J 50/10 using inductive coupling
• CPC Class Codes: H02J 50/27 characterised by the type of receiving antennas, e.g. rectennas
• CPC Class Codes: H02J 50/40 using two or more transmitting or receiving devices H02J50/50 takes precedence
• CPC Class Codes: H02M 7/103 Containing passive elements (capacitively coupled) which are ordered in cascade on one source

Abstract

In an RF tag, a mask ROM or a flash memory is used for storing data such as an ID number. Although the mask ROM can be realized at a low price, rewriting is not possible. In addition, in the flash memory, although electric rewriting is possible, production cost increases. Accordingly, it is difficult to provide an RF tag by which data rewriting is possible at a low price. An RF tag is provided with a power supply circuit having a function to generate a power supply voltage from a weak radio signal and a memory which can hold data stored in a data holding portion by the power supply voltage. With the above structure, a high-performance RF tag capable of rewriting data such as an ID number after production can be provided at a low price.

Claims

1. A semiconductor device comprising:

a first antenna circuit for receiving;

a second antenna circuit for transmitting and receiving;

a first power supply circuit configured to generate a first direct voltage by converting a first radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage;

a second power supply circuit configured to generate a second direct voltage from a second radio signal received by the second antenna circuit; and

a memory circuit to which the first direct voltage and the second direct voltage are supplied.

2. The semiconductor device according to claim 1, wherein the first radio signal and the second radio signal have different frequencies.

3. The semiconductor device according to claim 1, wherein the first radio signal and the second radio signal have different electric powers.

4. The semiconductor device according to claim 1, wherein one of the first power supply circuit and the second power supply circuit includes a charge pump circuit.

5. The semiconductor device according to claim 1, wherein the memory circuit includes a latch circuit.

6. The semiconductor device according to claim 1, wherein the memory circuit includes a flip-flop circuit.

7. The semiconductor device according to claim 1, wherein the memory circuit is a static random access memory.

8. The semiconductor device according to claim 1, wherein any one of the first power supply circuit, the second power supply circuit, and the memory circuit uses a thin film transistor in which a semiconductor thin film formed over a substrate including an insulating surface serves as an active layer.

9. The semiconductor device according to claim 8, wherein the substrate including the insulating surface is any one of a glass substrate, a quartz substrate, a plastic substrate, and a silicon on insulator substrate.

10. A semiconductor device comprising:

a first antenna circuit for receiving;

a second antenna circuit for transmitting and receiving;

a first power supply circuit configured to generate a first direct voltage by converting a radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage;

a second power supply circuit configured to generate a second direct voltage from the radio signal received by the second antenna circuit; and

a memory circuit to which the first direct voltage and the second direct voltage are supplied.

11. The semiconductor device according to claim 10, wherein one of the first power supply circuit and the second power supply circuit includes a charge pump circuit.

12. The semiconductor device according to claim 10, wherein the memory circuit includes a latch circuit.

13. The semiconductor device according to claim 10, wherein the memory circuit includes a flip-flop circuit.

14. The semiconductor device according to claim 10, wherein the memory circuit is a static random access memory.

15. The semiconductor device according to claim 10, wherein any one of the first power supply circuit, the second power supply circuit, and the memory circuit uses a thin film transistor in which a semiconductor thin film formed over a substrate including an insulating surface serves as an active layer.

16. The semiconductor device according to claim 15, wherein the substrate including the insulating surface is any one of a glass substrate, a quartz substrate, a plastic substrate, and a silicon on insulator substrate.

17. A semiconductor device comprising:

a first antenna circuit;

a second antenna circuit;

a first power supply circuit;

a second power supply circuit; and

a memory circuit,

wherein the first power supply circuit is configured to generate a first direct voltage from a first radio signal received by the first antenna circuit,

wherein the second power supply circuit is configured to generate a second direct voltage from a second radio signal received by the second antenna circuit,

wherein when only the first direct voltage of the first direct voltage and the second direct voltage is supplied to the memory circuit, the memory circuit holds data by using the first direct voltage which is supplied, and

wherein when the first direct voltage and the second direct voltage are supplied to the memory circuit, the memory circuit holds data by using the first direct voltage and the second direct voltage which are supplied.

18. The semiconductor device according to claim 17, wherein one of the first power supply circuit and the second power supply circuit includes a charge pump circuit.

19. The semiconductor device according to claim 17, wherein the memory circuit includes a latch circuit.

20. The semiconductor device according to claim 17, wherein the memory circuit includes a flip-flop circuit.

21. The semiconductor device according to claim 17, wherein the memory circuit is a static random access memory.

22. The semiconductor device according to claim 17, wherein any one of the first power supply circuit, the second power supply circuit, and the memory circuit uses a thin film transistor in which a semiconductor thin film formed over a substrate including an insulating surface serves as an active layer.

23. The semiconductor device according to claim 22, wherein the substrate including the insulating surface is any one of a glass substrate, a quartz substrate, a plastic substrate, and a silicon on insulator substrate.

24. A semiconductor device comprising:

a first antenna circuit;

a second antenna circuit;

a first power supply circuit;

a second power supply circuit; and

a memory circuit,

wherein the first power supply circuit is configured to generate a first direct voltage by converting a radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage,

wherein the second power supply circuit is configured to generate a second direct voltage from a radio signal received by the second antenna circuit, and

wherein the memory circuit is configured to operate using the second direct voltage and holds data using the first direct voltage.

25. A semiconductor device comprising:

a first antenna circuit;

a second antenna circuit;

a memory circuit including a memory cell and a control circuit which controls the memory cell;

a first power supply circuit which supplies a first direct voltage to the memory cell; and

a second power supply circuit which supplies a second direct voltage to the control circuit,

wherein the first power supply circuit is configured to generate the first direct voltage by converting a radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage, and

wherein the second power supply circuit is configured to generate the second direct voltage from a radio signal received by the second antenna circuit.