Novel, semiconductor-based, large-area, flexible, electronic devices

• US 20080217622A1
• Filed: 03/08/2007
• Published: 09/11/2008
• Est. Priority Date: 03/08/2007
• Status: Active Grant

• Current Assignee: Amit Goyal
• Original Assignee: Amit Goyal
• Inventors: Goyal, Amit
• Granted Patent: US 7,906,229 B2
• Time in Patent Office: Days
• US Class Current: 257/64
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02491 Conductive materials
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02568 Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 31/036 characterised by their crystalline structure or particular orientation of the crystalline planes
• CPC Class Codes: H01L 31/0392 including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate textured substrates H01L31/02366
• CPC Class Codes: H01L 31/03923 including AIBIIICVI compound materials, e.g. CIS, CIGS
• CPC Class Codes: H01L 31/03925 including AIIBVI compound materials, e.g. CdTe, CdS
• CPC Class Codes: H01L 31/03926 comprising a flexible substrate
• CPC Class Codes: Y02E 10/541 CuInSe2 material PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Claims

1. An electronic device comprising;

a. a flexible, crystalline, metal, alloy or ceramic substrate

b. at least one triaxially textured layer of an electronic material on said substrate, selected from a group comprising of but not limited to those based on indirect bandgap semiconductors such as Si, Ge, GaP;

direct bandgap semiconductors such as CdTe, CuInGaSe₂ (CIGS), GaAs, AlGaAs, GaInP and AlInP;

multiband semiconductors such as II-O-VI materials like Zn_1-yMn_yO_xTe_1-x and III-N-V multiband semiconductors such as GaN_xAs_1-x-yP_y, and combinations thereof. This includes minor dopants of other materials in the semiconductor layers for obtaining the required n-type or p-type semiconducting properties.

2. The article of claim 1 wherein the said semiconductor layer is a compound semiconductor composed of elements from two or more different groups of the Periodic Table, including compounds of Group III (B, Al, Ga, In) and Group V (N, P, As, Sb, Bi) for the compounds AlN, AlP, AlAs, GaN, GaP, GaAs, InP, InAs, InSb, AlInGaP, AlGaAs, InGaN etc, and the compounds of Group II (Zn, Cd, Hg) and Group VI (O, S, Se, Te) such as ZnS, ZnSe, ZnTe, CdTe, HgTe, CdHgTe etc. In addition to binary compounds of the above, ternary (three elements, e.g. InGaAs) and quaternary (four elements, e.g. InGaAsP) compounds are also are included.

3. The article of claim 1, wherein the said semiconductor layer corresponds to an elemental semiconductor or alloys of elements within the same group such as SiC and SiGe or a compound semiconductor comprising elements of group IB, IIIA and VIA of the periodic table such as alloys of copper, indium, gallium, aluminium, selenium and sulfur.

4. The article of claim 1 wherein said triaxially textured electronic material layer has a triaxial texture such that the distribution of grain orientations comprising the substrate is characterized by a FWHM of less than 10 degrees with respect to all three major crystallographic directions.

5. The article of claim 1, wherein the said textured semiconductor layer has a cubic, tetragonal or orthorhombic crystal structure and a crystallographic texture selected from a group comprising of but not limited to {100}<

100>

, {210}<

100> and

{110}<

100>

.

6. The article of claim 1, further comprising at least one buffer layer on said substrate selected from a group comprising a metal, an alloy, a nitride, boride, oxide, fluoride, carbide, silicide, intermetallic alloy with germanium or combinations thereof.

7. The article of claim 6 wherein said nitride buffer layer corresponds to a composition of MN, wherein N is Nitrogen and M is selected from a group comprising Ti, Ce, Y, Zr, Hf, V, Nb, Nd, La, and Al and their combinations thereof.

8. The article of claim 6 wherein said oxide buffer layer is selected from a group comprising of gamma Al₂O₃ (cubic form of Al₂O₃);

perovskites such as but not limited to SrTiO₃, (Sr,Nb)TiO₃, BaTiO₃, (Ba,Ca)TiO₃, LaMnO₃, LaAlO₃, doped perovskites such as (La,Sr)MnO₃, (La,Ca)MnO₃;

layered perovskites such as Bi₄Ti₃O₁₂;

pyrochlores such as but not limited to La₂Zr₂O₇, Ca₂Zr₂O₇, Gd₂Zr₂O₇;

flourites such as Y₂O₃, YSZ;

rock-salt oxides such as but not limited to MgO;

spinels such as but not limited to MgAl₂O₄.

9. The article of claim 6 wherein said buffer layer comprises a mixture of a nitride and an oxide such as MN_xO_y (1<

x, y>

0), wherein N is Nitrogen and O is Oxygen and M is selected from a group comprising Ti, Ce, Y, Zr, Hf, V, Nb, Nd, La, and Al and their combinations thereof.

10. The article of claim 6 wherein the said silicide buffer layer or an intermetallic alloy with germanium corresponds to a layer with a chemical formula, MSi or MSi₂, MSi₃, MGe or MGe₂, MGe₃, wherein M is a metal such as but not limited to Ni, Cu, Fe, Ir, and Co.

11. The article of claim 6 wherein said carbide buffer layer corresponds to the cubic form of SiC.

12. The article of claim 6 wherein the said buffer layer is a “

graded buffer layer”

comprising of multiple buffer layers with varying lattice parameters to provide a good lattice match to the semiconductor layer.

13. The article of claim 6 wherein at least the top buffer layer is electrically conducting.

14. The article of claim 6 wherein at least one buffer layer has a triaxial texture characterized by a FWHM of less than 10 degrees in all three major crystallographic directions.

15. The article of claim 1 further comprising a semiconductor template layer to provide a good lattice match to the semiconductor device layer.

16. The article of claim 15 wherein the semiconductor template layer is a “

graded semiconductor template”

layer with multiple layers of varying lattice parameters so as to provide a good lattice match to the semiconductor device layer.

17. The article of claim 1 wherein said flexible metal or alloy substrate has a triaxial texture such that the distribution of grain orientations comprising the substrate is characterized by a FWHM of less than 10 degrees with respect to all three major crystallographic directions.

18. The article of claim 17 wherein the said substrate is selected from a group comprising Cu, Ni, Al, Mo, Nb and Fe and their alloys thereof.

19. The article of claim 1 wherein said crystalline metal, alloy or ceramic substrate is a single crystal with a mosaic less than 2 degrees.

20. The article of claim 1 wherein said metal, alloy or ceramic substrate comprises a single grain having a length of at least 0.1 meter, said single grain substrate having sub-grain boundaries with sub-grain boundary misorientations less than 2 degrees.

21. The article of claim 1 wherein said electronic device layer is a photovoltaic device comprising at least one pn junction parallel to the substrate surface.

22. The article of claim 21 wherein the photovoltaic device comprises a multijunction cell with at least two and preferably three pn junctions parallel to the substrate surface.

23. The article of claim 21 wherein the conversion efficiency of said device layer is greater than 8%.

24. The article of claim 21 wherein the conversion efficiency of said device layer is greater than 12%.

25. The article of claim 1 wherein the said device has an area greater than 50 in².

26. The article of claim 1 wherein the said device has an area greater than 113 in².

27. The article of claim 1 wherein the (100) or (200) crystallographic plane of the device layer is parallel to the surface of the substrate within 10 degrees.

28. The article of claim 1 wherein the (110) or (220) or (210) crystallographic plane of the device layer is parallel to the surface of the substrate within 10 degrees.

29. The article of claim 1 wherein the said electronic device is selected from a group comprising of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

30. The article of claim 1 wherein the said electronic device forms a component of a flat-panel active-matrix liquid crystal display (AMLCD) or a flat-panel active-matrix organic light-emitting diode (AMOLED) display.

31. The article of claim 1 wherein said electronic device comprises at least one device component selected from a group comprising of two terminal devices such as a diode;

three terminal devices such as a transistor, thyristor or rectifier; and

multi-terminal devices such as a microprocessor, random access memory, read-only-memory or a charge-coupled device.