Multi-level electrical fuse using one programming device

• US 20080217734A1
• Filed: 03/08/2007
• Published: 09/11/2008
• Est. Priority Date: 03/08/2007
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chung, Shine, Lin, Yung-Lung, Wu, Jui-Jen, Hsuen, Fu-Lung
• Granted Patent: US 8,223,575 B2
• Time in Patent Office: Days
• US Class Current: 257/529
• CPC Class Codes: G11C 11/5692 read-only digital stores using storage elements with more than two stable states
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A multi-level electrical fuse system comprises at least one fuse box having at least one electrical fuse, a programming device serially coupled to the electrical fuse, and a variable power supply coupled to the fuse box and configured to generate two or more voltage levels.

Claims

1. A multi-level electrical fuse system comprising:

at least one fuse box having;

at least one electrical fuse;

a programming device serially coupled to the electrical fuse; and

a variable power supply coupled to the fuse box and configured to generate two or more voltage levels.

2. The system of claim 1, wherein the electrical fuse is selected from the group consisting of a silicide polysilicon fuse, a non-volatile fuse and a contact fuse.

3. The system of claim 1, wherein

the programming device comprises a NMOS transistor having a gate, a source and a drain coupled to a programming selection signal, a GND and a first terminal of the fuse, respectively;

and

a second terminal of the fuse is coupled to the variable power supply.

4. The system of claim 1, wherein

the programming device comprises a PMOS transistor having a gate, a source and a drain coupled to a programming selection signal, the variable power supply and a first terminal of the fuse, respectively, and

a second terminal of the fuse is coupled to the GND.

5. The system of claim 1 further comprising a fuse writing circuit having:

a comparator having a first input coupled to the fuse box and a second input coupled to a controllable state reference circuit, wherein when the first input voltage is higher than the second input voltage, the comparator outputs a first logic state and when the first input voltage is lower than the second input voltage, the comparator outputs a second logic state complementary to the first logic state; and

a control circuit coupled between an output of the comparator and the programming device.

6. The system of claim 5, wherein the controllable state reference circuit comprises a controllable resistive voltage divider generating two or more voltage levels corresponding to two or more variations of resistances of the voltage divider.

7. The system of claim 5, wherein the control circuit comprises a flip-flop for latching the first logic state which is used to shut off the programming device.

8. A multi-level electrical fuse system comprising:

at least one fuse box having;

at least one electrical fuse;

a programming device serially coupled to the electrical fuse; and

a fuse writing circuit having;

a comparator having a first input coupled to the fuse box and a second input coupled to a controllable state reference circuit, wherein when the first input voltage is higher than the second input voltage, the comparator outputs a first logic state and when the first input voltage is lower than the second input voltage, the comparator outputs a second logic state complementary to the first logic state; and

a control circuit coupled between an output of the comparator and the programming device.

9. The system of claim 8, wherein the electrical fuse is selected from the group consisting of a silicide polysilicon fuse, a non-volatile fuse and a contact fuse.

10. The system of claim 8, wherein

the programming device comprises a NMOS transistor having a gate, a source and a drain coupled to a programming selection signal, a GND and a first terminal of the fuse, respectively;

and

a second terminal of the fuse is coupled to a positive high voltage power supply (Vdd).

11. The system of claim 8, wherein

the programming device comprises a PMOS transistor having a gate, a source and a drain coupled to a programming selection signal, the Vdd and a first terminal of the fuse, respectively;

and

a second terminal of the fuse is coupled to the GND.

12. The system of claim 8 further comprising a variable power supply configured to generate two or more voltage levels.

13. The system of claim 8, wherein the controllable state reference circuit comprises a controllable resistive voltage divider generating two or more voltage levels corresponding to two or more variations of resistances of the voltage divider.

14. The system of claim 8, wherein the control circuit comprises a flip-flop for latching the first logic state which is used to shut off the programming device.

15. A multi-level electrical fuse system comprising:

at least one fuse box having;

at least one electrical fuse;

a programming device serially coupled to the electrical fuse;

a fuse writing circuit having;

a comparator having a first input coupled to the fuse box and a second input coupled to a controllable state reference circuit, wherein when the first input voltage is higher than the second input voltage, the comparator outputs a first logic state and when the first input voltage is lower than the second input voltage, the comparator outputs a second logic state complementary to the first logic state; and

a control circuit coupled between an output of the comparator and the programming device; and

a variable power supply coupled to the fuse box and configured to generate two or more voltage levels.

16. The system of claim 15, wherein the electrical fuse is selected from the group consisting of a silicide polysilicon fuse, a non-volatile fuse and a contact fuse.

17. The system of claim 15, wherein

the programming device comprises a NMOS transistor having a gate, a source and a drain coupled to a programming selection signal, a GND and a first terminal of the fuse, respectively;

and

a second terminal of the fuse is coupled to the variable power supply.

18. The system of claim 15, wherein

the programming device comprises a PMOS transistor having a gate, a source and a drain coupled to a programming selection signal, the Vdd and a first terminal of the fuse, respectively;

and

a second terminal of the fuse is coupled to the GND.

19. The system of claim 15, wherein the controllable state reference circuit comprises a controllable resistive voltage divider generating two or more voltage levels corresponding to two or more variations of resistances of the voltage divider.

20. The system of claim 15, wherein the control circuit comprises a flip-flop for latching the first logic state, which is used to shut off the programming device.