LOW POWER VOLTAGE REFERENCE
First Claim
1. A voltage reference, comprising:
- a current mirror including a first node, a second node, a third node and a control input, wherein the first node of the current mirror is coupled to a first power supply node associated with a first power supply;
a first cell including a diode-connected stack of insulated-gate field-effect transistors (IGFETs), wherein the first cell is coupled between the second node of the current mirror and a second power supply node associated with the first power supply and the diode-connected stack of IGFETs includes a first transistor that is biased in a triode weak inversion region;
a second cell including a diode-connected stack of IGFETs and a serially coupled resistor, wherein the second cell is coupled between the third node of the current mirror and the second power supply node and the second cell is configured to provide a reference voltage at a reference node; and
an amplifier including a first input, a second input and an output, wherein the first input of the amplifier is coupled to a first intermediate node of the first cell, the second input of the amplifier is coupled to a first intermediate node of the second cell and the output of the amplifier is coupled to the control input of the current mirror, and wherein the first and second cells are configured to conduct respective proportional to absolute temperature (PTAT) currents and the amplifier is configured to force the first intermediate nodes of the first and second cells to a substantially similar voltage.
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Accused Products
Abstract
A voltage reference includes a first cell configured to receive a first proportional to absolute temperature (PTAT) current and a second cell configured to receive a second PTAT current. The first cell includes a diode-connected stack of insulated-gate field-effect transistors (IGFETs). The diode-connected stack of IGFETs includes a first transistor that is configured to be biased in a triode weak inversion region. The second cell includes a diode-connected stack of IGFETs and a serially coupled resistor. A magnitude of the second PTAT current is based on a drain-to-source voltage of the first transistor and a value of the serially coupled resistor. The voltage reference provides a reference voltage at a reference node of the second cell based on the second PTAT current.
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Citations
20 Claims
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1. A voltage reference, comprising:
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a current mirror including a first node, a second node, a third node and a control input, wherein the first node of the current mirror is coupled to a first power supply node associated with a first power supply; a first cell including a diode-connected stack of insulated-gate field-effect transistors (IGFETs), wherein the first cell is coupled between the second node of the current mirror and a second power supply node associated with the first power supply and the diode-connected stack of IGFETs includes a first transistor that is biased in a triode weak inversion region; a second cell including a diode-connected stack of IGFETs and a serially coupled resistor, wherein the second cell is coupled between the third node of the current mirror and the second power supply node and the second cell is configured to provide a reference voltage at a reference node; and an amplifier including a first input, a second input and an output, wherein the first input of the amplifier is coupled to a first intermediate node of the first cell, the second input of the amplifier is coupled to a first intermediate node of the second cell and the output of the amplifier is coupled to the control input of the current mirror, and wherein the first and second cells are configured to conduct respective proportional to absolute temperature (PTAT) currents and the amplifier is configured to force the first intermediate nodes of the first and second cells to a substantially similar voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A system, comprising:
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a device; and a voltage reference coupled to the device, the voltage reference comprising; a current mirror including a first node, a second node, a third node and a control input, wherein the first node of the current mirror is coupled to a first power supply node associated with a first power supply; a first cell including a diode-connected stack of insulated-gate field-effect transistors (IGFETs), wherein the first cell is coupled between the second node of the current mirror and a second power supply node associated with the first power supply and the diode-connected stack of IGFETs includes a first transistor that is biased in a triode weak inversion region; a second cell including a diode-connected stack of IGFETs and a serially coupled resistor, wherein the second cell is coupled between the third node of the current mirror and the second power supply node and the second cell is configured to provide a reference voltage for the device at a reference node; and an amplifier including a first input, a second input and an output, wherein the first input of the amplifier is coupled to a first intermediate node of the first cell, the second input of the amplifier is coupled to a first intermediate node of the second cell and the output of the amplifier is coupled to the control input of the current mirror, and wherein the first and second cells are configured to conduct respective proportional to absolute temperature (PTAT) currents and the amplifier is configured to force the first intermediate nodes of the first and second cells to a substantially similar voltage. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method of providing a reference voltage, comprising:
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providing a first proportional to absolute temperature (PTAT) current to a first cell including a diode-connected stack of insulated-gate field-effect transistors (IGFETs), wherein the diode-connected stack of IGFETs includes a first transistor that is biased in a triode weak inversion region; providing a second PTAT current to a second cell including a diode-connected stack of IGFETs and a serially coupled resistor, wherein a magnitude of the second PTAT current is based on a drain-to-source voltage of the first transistor and a value of the serially coupled resistor; and providing a reference voltage at a reference node of the second cell based on the second PTAT current. - View Dependent Claims (20)
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Specification