Semiconductor device and manufacturing method thereof

• US 20080220570A1
• Filed: 03/07/2008
• Published: 09/11/2008
• Est. Priority Date: 03/08/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Isobe, Atsuo, Godo, Hiromichi, Ohnuma, Hideto
• Granted Patent: US 8,143,118 B2
• Time in Patent Office: Days
• US Class Current: 438/166
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02675 using laser beams
• CPC Class Codes: H01L 21/02691 Scanning of a beam
• CPC Class Codes: H01L 27/1281 by using structural features to control crystal growth, e.g. placement of grain filters
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A semiconductor device having a highly responsive thin film transistor (TFT) with low subthreshold swing and suppressed decrease in the on-state current and a manufacturing method thereof are demonstrated. The THF of the present invention is characterized by its semiconductor layer where the thickness of the source region or the drain region is larger than that of the channel formation region. Manufacture of the TFT is readily achieved by the formation of an amorphous semiconductor layer on a projection portion and a depression portion, which is followed by subjecting the melting process of the semiconductor layer, resulting in the formation of a crystalline semiconductor layer having different thicknesses. Selective addition of impurity to the thick portion of the semiconductor layer provides a semiconductor layer in which the channel formation region is thinner than the source or drain region.

Claims

1. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer over an insulating substrate;

forming a first depression portion and a second depression portion with a projection portion therebetween by forming a second insulating layer over the insulating substrate;

forming an amorphous semiconductor layer over the first depression portion, the second depression portion, and the projection portion;

forming a crystalline semiconductor layer by melting the amorphous semiconductor layer; and

forming a source region or a drain region in the crystalline semiconductor layer by adding an impurity element to a first region of the crystalline semiconductor layer without adding an impurity element to a second region of the crystalline semiconductor layer,

wherein the first region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the first depression portion and the second depression portion, and

wherein the second region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the projection portion.

2. The method for manufacturing a semiconductor device according to claim 1,

wherein the second insulating layer is formed in a stripe pattern.

3. The method for manufacturing a semiconductor device according to claim 1,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be greater than or equal to 10 nm and less than or equal to 50 nm.

4. The method for manufacturing a semiconductor device according to claim 1,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be less than a thickness of the first region of the crystalline semiconductor layer.

5. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer over an insulating substrate;

forming a first depression portion and a second depression portion with a projection portion therebetween by forming a second insulating layer over the insulating substrate;

forming an amorphous semiconductor layer over the first depression portion, the second depression portion, and the projection portion;

forming a crystalline semiconductor layer having a planarized surface on the side opposite to the insulating substrate by melting the amorphous semiconductor layer; and

forming a source region or a drain region in the crystalline semiconductor layer by adding an impurity element to a first region of the crystalline semiconductor layer without adding an impurity element to a second region of the crystalline semiconductor layer,

wherein the first region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the first depression portion and the second depression portion, and

wherein the second region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the projection portion.

6. The method for manufacturing a semiconductor device according to claim 5,

wherein the second insulating layer is formed in a stripe pattern.

7. The method for manufacturing a semiconductor device according to claim 5,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be greater than or equal to 10 nm and less than or equal to 50 nm.

8. The method for manufacturing a semiconductor device according to claim 5,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be less than a thickness of the first region of the crystalline semiconductor layer.

9. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer over an insulating substrate;

forming a first depression portion and a second depression portion with a projection portion therebetween by forming a second insulating layer over the insulating substrate;

forming an amorphous semiconductor layer over the first depression portion, the second depression portion, and the projection portion;

forming a crystalline semiconductor layer by scanning the amorphous semiconductor layer with a laser beam; and

forming a source region or a drain region in the crystalline semiconductor layer by adding an impurity element to a first region of the crystalline semiconductor layer without adding an impurity element to a second region of the crystalline semiconductor layer,

wherein the first region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the first depression portion and the second depression portion, and

wherein the second region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the projection portion.

10. The method for manufacturing a semiconductor device according to claim 9,

wherein the second insulating layer is formed in a stripe pattern.

11. The method for manufacturing a semiconductor device according to claim 9,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be greater than or equal to 10 nm and less than or equal to 50 nm.

12. The method for manufacturing a semiconductor device according to claim 9,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be less than a thickness of the first region of the crystalline semiconductor layer.

13. The method for manufacturing a semiconductor device according to claim 9,

wherein the laser beam is a linear beam.

14. The method for manufacturing a semiconductor device according to claim 9,

wherein the laser beam is one selected from a continuous wave laser beam and a laser beam oscillated at a repetition rate of 10 MHz or more.

15. The method for manufacturing a semiconductor device according to claim 9,

wherein laser beam is a linear beam,

wherein the second insulating layer is formed in a stripe pattern.

wherein the scanning of the amorphous semiconductor layer is performed so that the long side of the linear beam crosses with a direction in which the plurality of second insulating layers extends and the laser beam is scanned in the direction in which the plurality of second insulating layers extends.

16. A method for manufacturing a semiconductor device comprising:

forming a first insulating layer over an insulating substrate;

forming a first depression portion and a second depression portion with a projection portion therebetween by forming a second insulating layer over the insulating substrate;

forming an amorphous semiconductor layer over the first depression portion, the second depression portion, and the projection portion;

forming a crystalline semiconductor layer having a planarized surface on the side opposite to the insulating substrate by scanning the amorphous semiconductor layer with a laser beam; and

forming a source region or a drain region in the crystalline semiconductor layer by adding an impurity element to a first region of the crystalline semiconductor layer without adding an impurity element to a second region of the crystalline semiconductor layer,

wherein the first region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the first depression portion and the second depression portion, and

wherein the second region of the crystalline semiconductor layer is a region where the crystalline semiconductor layer overlaps the projection portion.

17. The method for manufacturing a semiconductor device according to claim 16,

wherein the second insulating layer is formed in a stripe pattern.

18. The method for manufacturing a semiconductor device according to claim 16,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be greater than or equal to 10 nm and less than or equal to 50 nm.

19. The method for manufacturing a semiconductor device according to claim 16,

wherein a thickness of the second region of the crystalline semiconductor layer is arranged to be less than a thickness of the first region of the crystalline semiconductor layer.

20. The method for manufacturing a semiconductor device according to claim 16,

wherein the laser beam is a linear beam.

21. The method for manufacturing a semiconductor device according to claim 16,

wherein the laser beam is one selected from a continuous wave laser beam and a laser beam oscillated at a repetition rate of 10 MHz or more.

22. The method for manufacturing a semiconductor device according to claim 16,

wherein laser beam is a linear beam,

wherein the second insulating layer is formed in a stripe pattern, and

wherein the scanning of the amorphous semiconductor layer is performed so that the long side of the linear beam crosses with a direction in which the plurality of second insulating layers extends and the laser beam is scanned in the direction in which the plurality of second insulating layers extends.