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RESISTIVE MEMORY AND METHOD

  • US 20080224178A1
  • Filed: 03/16/2007
  • Published: 09/18/2008
  • Est. Priority Date: 03/16/2007
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a multi gate field effect transistor having a fin with a contact area; and

    a programmable memory element abutting the fin contact area.

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