BACKSIDE DEPLETION FOR BACKSIDE ILLUMINATED IMAGE SENSORS

• US 20080224247A1
• Filed: 04/22/2008
• Published: 09/18/2008
• Est. Priority Date: 09/29/2006
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hsu, Tzu-Hsuan, Liu, Han-Chi, Wang, Ching-Chun
• Granted Patent: US 8,436,443 B2
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 31/0232 Optical elements or arrangements associated with the device H01L31/0236 takes precedence; for photovoltaic cells H01L31/054; for photovoltaic modules H02S40/20

Abstract

A backside illuminated image sensor is provided which includes a substrate having a front side and a backside, a sensor formed in the substrate at the front side, the sensor including at least a photodiode, and a depletion region formed in the substrate at the backside, a depth of the depletion region is less than 20% of a thickness of the substrate.

Claims

1. A backside illuminated image sensor, comprising:

a substrate having a front side and a backside;

a sensor formed in the substrate at the front side, the sensor including at least a photodiode; and

a depletion region formed in the substrate at the backside, wherein a depth of the depletion region is less than 20% of a thickness of the substrate.

2. The backside illuminated image sensor of claim 1, wherein the thickness of the substrate is about 1 μ

m to about 5 μ

m.

3. The backside illuminated image sensor of claim 1, wherein the substrate is a type selected from the group consisting of:

a p-type substrate, an n-type substrate, an epitaxial layer, silicon-on-insulator, silicon, and combinations thereof.

4. The backside illuminated image sensor of claim 1, wherein the depth of the depletion region is less than 1000 A.

5. The backside illuminated image sensor of claim 1, wherein the photodiode is a type selected from a group consisting of:

a pinned layer photodiode and a non-pinned layer photodiode.

6. The backside illuminated image sensor of claim 1, wherein the sensor is a type selected from the group consisting of:

an active pixel sensor and a passive pixel sensor.

7. The backside illuminated image sensor of claim 1, further comprising:

a metal interconnection layer and interlayer dielectric formed on the front side of the substrate;

a color filter formed on the backside of the substrate and aligned with the sensor; and

a microlens formed over the color filter.

8. A method for fabricating a backside illuminated image sensor, the method comprising:

providing a substrate having a front side, a backside, and a first thickness;

forming a plurality of sensors in the substrate at the front side, wherein each of the plurality of sensors includes at least a photodiode;

reducing the thickness of the substrate from the first thickness to a second thickness; and

forming a depletion region in the substrate at the backside, wherein a depth of the depletion region is less than 20% of the second thickness of the substrate.

9. The method of claim 8, wherein the forming the depletion region includes:

implanting ions of a first conductivity type at a first depth from the backside of the substrate;

implanting ions of a second conductivity type at a second depth from the backside of the substrate, the second conductivity type being different from the first conductivity type, the second depth being less than the first depth; and

performing laser annealing to activate the ions of the first conductivity type and ions of the second conductivity type.

10. The method of claim 9, wherein the implanting ions of the first conductivity type includes utilizing a p-type dopant, an energy of 500 eV to about 50 KeV, and a dosage of 10e3 atoms/cm² to about 50e5 atoms/cm².

11. The method of claim 9, wherein the implanting ions of the second conductivity type includes utilizing an n-type dopant, an energy of 500 eV to about 40 KeV, and a dosage of 10e3 atoms/cm² to about 50e5 atoms/cm².

12. The method of claim 9, wherein the performing laser annealing includes utilizing a power density of about 0.5 J/cm² to about 10 J/cm².

13. The method of claim 8, wherein the depth of the depletion region is less than about 1000 A.

14. The method of claim 8, wherein the second thickness of the substrate is about 1 μ

m to about 5 μ

m.

15. The method of claim 8, further comprising:

forming a metal interconnection layer and interlayer dielectric on the front side of the substrate;

forming a color filter on the backside of the substrate and aligned with the sensor; and

forming a microlens formed over the color filter.

16. A semiconductor device comprising:

a semiconductor substrate having a front surface and a back surface;

a plurality of sensing elements formed in substrate underneath the front surface, wherein each of the sensing elements includes at least a photodiode for sensing light radiation directed towards the back surface;

a first doped layer formed in the substrate at a first depth from the back surface; and

a second doped layer formed in the substrate at a second depth from the back surface, the second depth being less than the first depth;

wherein a depth of a depletion region associated with the first and second doped layers is less than 20% of a thickness of the semiconductor substrate.

17. The semiconductor device of claim 16, wherein the depth of the depletion region is less than about 1000 A.

18. The semiconductor device of claim 16, wherein the thickness of the semiconductor substrate is about 1 μ

m to about 5 μ

m.

19. The semiconductor device of claim 16, wherein the first doped layer includes a p+ doped layer and wherein the second doped layer includes an n+ doped layer.

20. The semiconductor device of claim 16, further comprising:

a metal interconnection layer and interlayer dielectric formed on the front surface of the substrate;

a color filter formed on the back surface of the substrate and aligned with the sensor; and

a microlens formed over the color filter.