PRINTED CIRCUIT BOARD, DESIGN METHOD THEREOF AND MAINBOARD OF TERMINAL PRODUCT

• US 20080230258A1
• Filed: 03/21/2008
• Published: 09/25/2008
• Est. Priority Date: 03/23/2007
• Status: Active Grant

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: SHEN, Xiaolan, YE, Qingsong, WEI, Konggang
• Granted Patent: US 8,723,047 B2
• Time in Patent Office: Days
• US Class Current: 174/251
• CPC Class Codes: G06F 1/16 Constructional details or arrangements
• CPC Class Codes: H05K 1/0218 by printed shielding conductors, ground planes or power plane H05K1/0236 takes precedence
• CPC Class Codes: H05K 1/025 Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance H05K1/024 and H05K1/0243 take precedence; for semiconductor devices H01L23/66
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 2201/0191 wherein the thickness of the dielectric plays an important role
• CPC Class Codes: H05K 2201/0715 provided by an outer layer of PCB
• CPC Class Codes: H05K 2201/09536 Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/09627 Special connections between adjacent vias, not for grounding vias redundant conductors or connections H05K2201/0979

Abstract

A printed circuit board and a design method thereof are disclosed. The design method includes: wiring signal lines on an area basis at inner layers adjacent to outer surface layers; arranging the outer surface layers with no wiring or few wirings and interconnecting the outer surface layers by way of through vias, so that the outer surface layers function as a primary ground; and setting parameters of a line width and a layer height to control a target impedance value. The printed circuit board includes outer surface layers and two inner layers therebetween. The inner layers adjacent to the outer surface layers are used for arranging signal lines on an area basis; and the outer surface layers are arranged with no wiring or few wirings and are interconnected as a primary ground through vias. The invention also discloses a mainboard of a terminal product using the printed circuit board.

Claims

1. A method of designing a printed circuit board, comprising:

wiring signal lines on an area basis at inner layers adjacent to outer surface layers;

arranging the outer surface layers with no wiring or with few wirings and interconnecting the outer surface layers through vias, so that the outer surface layers function as a primary ground; and

setting parameters of a line width and a layer height to control a target impedance value.

2. The method of designing a printed circuit board according to claim 1, wherein:

if one of the outer surface layers is a keyboard arrangement side, radio frequency signal lines, power signal lines, clock signal lines and audio signal lines are arranged at the inner layer adjacent to the outer surface layer.

3. The method of designing a printed circuit board according to claim 1, wherein:

if one of the outer surface layers is a device arrangement side, radio frequency signal lines, data buses and multimedia signal lines are arranged at the inner layer adjacent to the outer surface layer.

4. The method of designing a printed circuit board according to claim 3, wherein:

the data buses and the multimedia signal lines are clustered by categories and wired by clusters.

5. The method of designing a printed circuit board according to claim 1, wherein:

the number of the inner layers in the printed circuit board is two.

6. The method of designing a printed circuit board according to claim 2, wherein:

the number of the inner layers in the printed circuit board is two.

7. The method of designing a printed circuit board according to claim 3, wherein:

the number of the inner layers in the printed circuit board is two.

8. The method of designing a printed circuit board according to claim 4, wherein:

the number of the inner layers in the printed circuit board is two.

9. A printed circuit board, comprising outer surface layers and at least one inner layer between the outer surface layers, wherein:

the inner layer adjacent to the outer surface layers is used for arranging signal lines, and the signal lines are wired on an area basis at the inner layer; and

the outer surface layers are arranged with no wiring or with few wirings and are interconnected as a primary ground through through vias.

10. The printed circuit board according to claim 9, wherein:

if one of the outer surface layers is a keyboard arrangement side, the inner layer adjacent to the outer surface layer are used for arranging radio frequency signal lines, power signal lines, clock signal lines and audio signal lines.

11. The printed circuit board according to claim 9, wherein:

if one of the outer surface layers is a device arrangement side, the inner layer adjacent to the outer surface layer are used for arranging radio frequency signal lines, data buses and multimedia signal lines.

12. The printed circuit board according to claim 9, wherein:

the number of the inner layer in the printed circuit board is two, at least one BGA-packaged device is provided on the printed circuit board, a blind via in the printed circuit board is a laser blind via, a buried via and a through via are mechanical vias, the laser blind via in a BGA area is arranged below a pad of the BGA-packaged device, and a ground copper sheet with a large area in the BGA area is a mesh copper sheet.

13. The printed circuit board according to claim 10, wherein:

the number of the inner layer in the printed circuit board is two, at least one BGA-packaged device is provided on the printed circuit board, a blind via in the printed circuit board is a laser blind via, a buried via and a through via are mechanical vias, the laser blind via in a BGA area is arranged below a pad of the BGA-packaged device, and a ground copper sheet with a large area in the BGA area is a mesh copper sheet.

14. The printed circuit board according to claim 11, wherein:

the number of the inner layer in the printed circuit board is two, at least one BGA-packaged device is provided on the printed circuit board, a blind via in the printed circuit board is a laser blind via, a buried via and a through via are mechanical vias, the laser blind via in a BGA area is arranged below a pad of the BGA-packaged device, and a ground copper sheet with a large area in the BGA area is a mesh copper sheet.

15. A mainboard of a terminal product, comprising a core chip of a baseband or radio frequency module, wherein:

the mainboard of the terminal product is a four-layer printed circuit board comprising surface layers and two inner layers between the surface layers;

the surface layers comprises a top layer and a bottom layer which are respectively a primary reference ground layer consisted of a ground copper sheet with a large area, and the ground copper sheets with a large area of the top layer and the bottom layer are interconnected by way of through vias; and

the inner layers are primary wiring layers where wiring areas are divided by functions;

a distance between the inner layers is above or equal to a distance between each of the surface layers and the inner layers adjacent to the surface layer; and

the wiring area at each of the inner layers corresponds to the ground copper sheet area with a large area at a layer adjacent to the inner layer or vertically arranged traveling lines at the layer adjacent to the inner layer.

16. The mainboard of a terminal product according to claim 15, wherein a blank area at the inner layers other than the wiring areas is grounded.

17. The mainboard of a terminal product according to claim 16, wherein devices internal to each functional module are arranged in a traveling direction of a circuit signal, and a radio frequency area and a digital area are arranged respectively within a shielding structure.

18. The mainboard of a terminal product according to claim 17, wherein for impedance of a radio frequency wiring, the consistency of a line width, a interlayer distance, a dielectric DK value and/or a copper thickness are controlled so as to control the continuity of the impedance of the radio frequency wiring indirectly.

19. The mainboard of a terminal product according to claim 16, wherein the surface layers of the mainboard of the terminal product are arranged with wirings disposed within a shielding structure.

20. The mainboard of a terminal product according to claim 16, wherein master power lines are arranged in the inner layers, wired along a board edge and isolated from the board edge by a ground line.

21. The mainboard of a terminal product according to claim 16, wherein the top layer is arranged as a keyboard arrangement side of the terminal product, and the bottom layer is arranged as a primary device arrangement side of the terminal device.

22. The mainboard of a terminal product according to claim 21, wherein audio lines are arranged at the inner layer adjacent to the top layer, and correspond to the keyboard arrangement side and are kept away from a keyboard pad.

23. The mainboard of a terminal product according to claim 21, wherein audio lines are arranged at the inner layer adjacent to the bottom layer and are kept away from device pin pads of high speed signals and power signals at the primary device arrangement side.

24. The mainboard of a terminal product according to claim 21, wherein audio lines are isolated from surrounding signal lines at the same layer by a ground line.

25. The mainboard of a terminal product according to claim 21, wherein clock lines are arranged at the inner layer adjacent to the bottom layer and are kept away from device pin pads of high speed signals and power signals at the primary device arrangement side.

26. The mainboard of a terminal product according to claim 21, wherein data lines are arranged at the inner layer adjacent to the primary device arrangement side, and include by categories LCD data lines, interface lines, JTAG lines, serial port lines, UIM card lines and keyboard lines;

the data lines are clustered by categories and are wired by clusters, and the clusters are isolated from each other by a ground line.

27. The mainboard of a terminal product according to claim 15, wherein the mainboard has a 1+2+1 laminated structure including an interposed double sided board, two sides of which are laminated respectively with a prepreg and a copper foil, a blind via in the mainboard is a laser blind via, and a buried via and a through via are mechanical vias.

28. The mainboard of a terminal product according to claim 16, wherein the mainboard has a 1+2+1 laminated structure including an interposed double sided board, two sides of which are laminated respectively with a prepreg and a copper foil, a blind via in the mainboard is a laser blind via, and a buried via and a through via are mechanical vias.

29. The mainboard of a terminal product according to claim 27, wherein the mainboard of the terminal product is provided with at least one BGA-packaged device with a pin pitch selected from any or combination of 1 mm, 0.8 mm, 0.65 mm, 0.5 mm and 0.4 mm.

30. The mainboard of a terminal product according to claim 27, wherein thicknesses between the surface layers and the respective adjacent inner layers range from 60 μ

m to 80 μ

m.

31. The mainboard of a terminal product according to claim 27, wherein a thickness of a dielectric between the inner layers is above or equal to 0.1 mm and the total thickness of the mainboard is below or equal to 1.6 mm.

32. The mainboard of a terminal product according to claim 15, wherein the mainboard has a 2+2 laminated structure including two double side board separated by a prepreg layer, a blind via in the mainboard is a mechanical blind via, and a buried via and a through via are mechanical vias.

33. The mainboard of a terminal product according to claim 16, wherein the mainboard has a 2+2 laminated structure including two double side board separated by a prepreg layer, a blind via in the mainboard is a mechanical blind via, and a buried via and a through via are mechanical vias.

34. The mainboard of a terminal product according to claim 32, wherein the mainboard of the terminal product is provided with at least one BGA-packaged device, the laser blind via in a BGA area are provided below a pad of the BGA-packaged device, and a ground copper sheet with a large area in the BGA area is a mesh copper sheet.

35. The mainboard of a terminal product according to claim 32, wherein distance between the surface layers and the respective adjacent inner layers is above or equal to 0.1 mm.

36. The mainboard of a terminal product according to claim 32, wherein the total board thickness of the mainboard is below or equal to 2 mm.