SIGNAL CONDITIONING FOR AN OPTICAL ENCODER

• US 20080231326A1
• Filed: 03/22/2007
• Published: 09/25/2008
• Est. Priority Date: 03/22/2007
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies ECBU IP Singapore Pte Limited (Broadcom, Inc.)
• Inventors: Chua, Seng Yee, Rai, Abhay Kumar, Anantapur, Shaik Hameed
• Granted Patent: US 7,554,079 B2
• Time in Patent Office: Days
• US Class Current: 327/72
• CPC Class Codes: G01D 5/24461 by redundancy or plausibility
• CPC Class Codes: G01D 5/2448 Correction of gain, threshold, offset or phase control

Abstract

An encoder with signal conditioning of an emitter drive signal is described. In one embodiment, the encoder includes a peak comparator, a pulse generator, a threshold comparator, and digital circuitry. The peak comparator outputs a peak comparator signal based on a comparison of an input sinusoidal signal stored at a first time with the input sinusoidal signal stored at a second time. The pulse generator determines a peak of the input sinusoidal signal based on the peak comparator signal. The threshold comparator compares a differential signal amplitude with a differential signal amplitude window at approximately the peak of the input sinusoidal signal. The differential signal amplitude is associated with the input sinusoidal signal. The digital circuitry generates an emitter modification signal in response to a determination that the differential signal amplitude is outside of the differential signal amplitude window.

Claims

1. An encoder with signal conditioning of an emitter drive signal, the encoder comprising:

a peak comparator to output a peak comparator signal based on a comparison of an input sinusoidal signal stored at a first time with the input sinusoidal signal stored at a second time;

a pulse generator coupled to the peak comparator, the pulse generator to determine a peak of the input sinusoidal signal based on the peak comparator signal;

a threshold comparator coupled to the pulse generator, the threshold comparator to compare a differential signal amplitude with a differential signal amplitude window at approximately the peak of the input sinusoidal signal, wherein the differential signal amplitude is associated with the input sinusoidal signal; and

digital circuitry coupled to the threshold comparator, the digital circuitry to generate an emitter modification signal in response to a determination that the differential signal amplitude is outside of the differential signal amplitude window.

2. The encoder of claim 1 further comprising a switched capacitor circuit coupled to the peak comparator, the switched capacitor circuit comprising a plurality of capacitors coupled to a corresponding plurality of switches, wherein a first switched capacitor is configured to store the input sinusoidal signal at the first time, and a second switched capacitor is configured to store the input sinusoidal signal at the second time.

3. The encoder of claim 1 wherein the pulse generator is further configured to generate a switch pulse at approximately the peak of the input sinusoidal signal, the switch pulse to control the threshold comparator.

4. The encoder of claim 3 wherein the threshold comparator comprises a high threshold comparator and a low threshold comparator, wherein the high threshold comparator is configured to determine if the differential signal amplitude is lower than a high window threshold of the differential signal amplitude window, and the low threshold comparator is configured to determine if the differential signal amplitude is higher than a low window threshold of the differential signal amplitude window.

5. The encoder of claim 3 wherein the threshold comparator comprises an analog-to-digital converter (ADC).

6. The encoder of claim 1 further comprising a digital-to-analog converter (DAC) coupled between an output of the digital circuitry and a base of a bipolar junction transistor (BJT), the digital-to-analog converter configured to convert the emitter modification signal from a digital signal to an analog signal to change a base voltage of the bipolar junction transistor, wherein the bipolar junction transistor is coupled to an emitter light source.

7. The encoder of claim 1 wherein the digital circuitry is further configured to change a count of an N-bit counter.

8. The encoder of claim 1 wherein the differential signal amplitude is defined as:

V_AMP=V_IP−

V_IN,

wherein V_IP comprises a first sinusoidal voltage signal derived from a first component, I_sin+, of a sinusoidal differential current signal and VIN comprises a second sinusoidal voltage signal derived from a second component, I_sin−

, of the sinusoidal differential current signal.

9. A method for conditioning an emitter drive signal of an optical encoder, the method comprising:

comparing an input sinusoidal signal stored at a first time with the input sinusoidal signal stored at a second time to determine a peak of the input sinusoidal signal;

comparing a differential signal amplitude with a differential signal amplitude window at approximately the peak of the input sinusoidal signal, wherein the differential signal amplitude is associated with the input sinusoidal signal; and

generating an emitter modification signal in response to a determination that the differential signal amplitude is outside of the differential signal amplitude window.

10. The method of claim 9 further comprising:

storing the input sinusoidal signal at the first time in a first switched capacitor, wherein the first time corresponds to a first portion of a clock cycle; and

storing the input sinusoidal signal at the second time after the first time in a second switched capacitor, wherein the second time corresponds to a second portion of the clock cycle.

11. The method of claim 9 further comprising generating a switch pulse at approximately the peak of the input sinusoidal signal to turn on a differential signal circuit, wherein the differential signal circuit enables the comparison of the differential signal amplitude with the differential signal amplitude window and enables the generation of the emitter modification signal.

12. The method of claim 9 wherein comparing the differential signal amplitude to the differential signal amplitude window comprises:

comparing the differential signal amplitude with a high window threshold; and

comparing the differential signal amplitude with a low window threshold.

13. The method of claim 9 wherein generating the emitter modification signal comprises changing a base voltage supplied to a bipolar junction transistor (BJT) coupled to an emitter light source.

14. The method of claim 13 further comprising changing an N-bit bit stream by incrementing or decrementing a count of an N-bit counter.

15. The method of claim 9 wherein comparing the differential signal amplitude with the differential signal amplitude window comprises comparing a positive peak of the differential signal amplitude with the differential signal amplitude window.

16. The method of claim 9 wherein comparing the differential signal amplitude with the differential signal amplitude window comprises comparing a negative peak of the differential signal amplitude with the differential signal amplitude window.

17. The method of claim 9 further comprising generating an error signal if the differential signal amplitude is outside of a detectable range.

18. An apparatus for signal conditioning within an encoder, the apparatus comprising:

means for storing an input sinusoidal signal at a plurality of times;

means for determining a peak of the input sinusoidal signal based on the stored input sinusoidal signal; and

means for generating an emitter modification signal in response to a determination that a differential signal amplitude is outside of a differential signal amplitude window at approximately the peak of the input sinusoidal signal.

19. The apparatus of claim 18 further comprising means for controlling a plurality of switched capacitors.

20. The apparatus of claim 18 further comprising means for comparing the differential signal amplitude with a high window threshold and a low window threshold of the differential amplitude comparison window.