Method and System for Integration of Bluetooth and FM Local Oscillator Generation into a Single Unit Using a DDFS

• US 20080232522A1
• Filed: 05/29/2007
• Published: 09/25/2008
• Est. Priority Date: 03/19/2007
• Status: Abandoned Application

• Current Assignee: Broadcom Corporation (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Maryam, Rofougaran, Ahmadreza
• Application Number:
  US11/754,460
• Publication Number:
  US 20080232522A1
• Time in Patent Office: Days
• US Class Current: 375/355
• CPC Class Codes: H03F 2200/129 there being a feedback over the complete amplifier
• CPC Class Codes: H03F 2200/156 One or more switches are realised in the feedback circuit of the amplifier stage
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/7236 the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers by (a ) switch(es)
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages
• CPC Class Codes: H03G 3/3078 Circuits generating control signals for digitally modulated signals

Abstract

Certain aspects of a method and system for integration of Bluetooth and FM local oscillator generation in a single unit using a direct digital frequency synthesizer (DDFS) may be disclosed. Aspects of the method may include generating a clock signal at a particular frequency in a chip that handles communication of Bluetooth signals and FM signals. The generated clock signal may be divided to produce a frequency divided clock signal, which may be mixed with the generated clock signal to enable transmission and/or reception of Bluetooth signals. The generated clock signal or the frequency divided clock signal may be selected for clocking one or more direct digital frequency synthesizers (DDFSs) to enable transmission and/or reception of the FM signals.

Claims

1. A method for communicating signals, the method comprising:

in a chip that handles communication of Bluetooth signals and FM signals;

generating a clock signal at a particular frequency;

dividing said generated clock signal to produce a frequency divided clock signal, which is mixed with said generated clock signal to enable transmission of said Bluetooth signals or reception of said Bluetooth signals; and

selecting said generated clock signal or said frequency divided clock signal for clocking one or more direct digital frequency synthesizers (DDFSs) to enable transmission of said FM signals or reception of said FM signals.

2. The method according claim 1, comprising clocking via said generated clock signal or said frequency divided clock signal, at least one of said DDFSs to enable said transmission of said FM signals or said reception of said FM signals.

3. The method according to claim 1, comprising generating a Bluetooth clock signal by mixing said generated clock signal with said produced frequency divided clock signal.

4. The method according claim 3, wherein said generated Bluetooth clock signal comprises an in phase (I) component and a quadrature phase (Q) component.

5. The method according claim 3, wherein said generated Bluetooth clock signal enables said transmission of said Bluetooth signals or said reception of said Bluetooth signals.

6. The method according to claim 1, comprising generating a FM clock signal to enable said transmission of said FM signals or said reception of said FM signals via said one or more DDFSs.

7. The method according claim 6, wherein said generated FM clock signal comprises an in phase (I) component and a quadrature phase (Q) component.

8. The method according to claim 1, comprising generating said clock signal at said particular frequency utilizing one or more of:

a voltage controlled oscillator (VCO) and a fractional synthesizer.

9. The method according to claim 1, comprising controlling said transmission of said FM signals or said reception of said FM signals via a bidirectional coupler.

10. The method according to claim 1, comprising modifying a frequency of said selected said generated clock signal or said frequency divided clock signal based on a received control word.

11. The method according to claim 10, comprising adjusting said received control word to compensate for changes in said generated clock signal.

12. A system for communicating signals, the system comprising:

one or more circuits in a chip that handles communication of Bluetooth signals and FM signals, wherein said one or more circuits enable generation of a clock signal at a particular frequency;

said one or more circuits enable division of said generated clock signal to produce a frequency divided clock signal, which is mixed with said generated clock signal to enable transmission of said Bluetooth signals or reception of said Bluetooth signals; and

said one or more circuits enable selection of said generated clock signal or said frequency divided clock signal for clocking one or more direct digital frequency synthesizers (DDFSs) to enable transmission of said FM signals or reception of said FM signals.

13. The system according claim 12, wherein said one or more circuits enable clocking via said generated clock signal or said frequency divided clock signal, at least one of said DDFSs to enable said transmission of said FM signals or said reception of said FM signals.

14. The system according claim 12, wherein said one or more circuits enable generation of a Bluetooth clock signal by mixing said generated clock signal with said produced frequency divided clock signal.

15. The system according claim 14, wherein said generated Bluetooth clock signal comprises an in phase (I) component and a quadrature phase (Q) component.

16. The system according claim 14, wherein said generated Bluetooth clock signal enables said transmission of said Bluetooth signals or said reception of said Bluetooth signals.

17. The system according to claim 12, wherein said one or more circuits enable generation of a FM clock signal to enable said transmission of said FM signals or said reception of said FM signals via said one or more DDFSs.

18. The system according claim 17, wherein said generated FM clock signal comprises an in phase (I) component and a quadrature phase (Q) component.

19. The system according to claim 12, wherein said one or more circuits enable generation of said clock signal at said particular frequency utilizing one or more of:

a voltage controlled oscillator (VCO) and a fractional synthesizer.

20. The system according to claim 12, wherein said one or more circuits enable controlling of said transmission of said FM signals or said reception of said FM signals via a bidirectional coupler.

21. The system according to claim 12, wherein said one or more circuits enable modification of a frequency of said selected said generated clock signal or said frequency divided clock signal based on a received control word.

22. The system according to claim 21, wherein said one or more circuits enable adjusting of said received control word to compensate for changes in said generated clock signal.