ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY

• US 20080233748A1
• Filed: 03/23/2007
• Published: 09/25/2008
• Est. Priority Date: 03/23/2007
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Wang, Yu, Bhalla, Anup, Li, Tiesheng, Lou, Yingying
• Granted Patent: US 8,021,563 B2
• Time in Patent Office: Days
• US Class Current: 438/689
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method for determining the depth etch, a method of forming a shielded gate trench (SGT) structure and a semiconductor device wafer are disclosed. A material layer is formed over part of a substrate having a trench. The material fills the trench. A resist mask is placed over a test portion of the layer of material. The resist mask does not cover the trench. The layer of material is isotropically etched. An etch depth may be determined from a characteristic of etching of the material underneath the mask. Such a method may be used for forming SGT structures. The wafer may comprise a layer of material disposed on at least a portion of a surface of semiconductor wafer; a resist mask comprising an angle-shaped test portion disposed over a portion of the layer of material; and a ruler marking on the surface of the substrate proximate the test portion.

Claims

1. A method for determining etch depth, comprising:

a) forming a layer of material over a portion of a substrate having a trench formed thereon in such a way that the material fills the trench;

b) placing a mask over a test portion of the layer of material, wherein the mask does not cover the trench;

c) isotropically etching the layer of material;

d) determining a depth D_T of etching of the material in the trench based on a characteristic of etching of the material underneath a portion of the mask.

2. The method of claim 1, wherein the characteristic of etching is an amount of lateral undercut of the test portion underneath the mask, wherein d) comprises:

measuring the amount of lateral undercut D_L; and

determining the depth of etched length of the material in the trench from the amount of undercut D_L.

3. The method of claim 2 wherein the mask comprises a rectangular shape.

4. The method of claim 2, wherein the mask comprises a circular shape.

5. The method of claim 2 wherein the mask comprises a portion having an angled shape having a tip angle θ

.

6. The method of claim 5 wherein the mask over the test portion comprises a chevron shape.

7. The method of claim 5, wherein the mask over the test portion comprises a triangular or dagger shape.

8. The method of claim 5 wherein measuring the amount of lateral undercut D_L comprises measuring a change in length Δ

L of the test portion and determining the amount of lateral undercut D_L from the change in length Δ

L.

9. The method of claim 8, further comprising:

e) forming a marking ruler proximate the test portion, wherein the ruler is adapted to facilitate measurement of the change length Δ

L of the test portion.

10. The method of claim 8 wherein determining the amount of lateral undercut D_L from the change in length Δ

L comprises approximating the amount of undercut D_L as D_L ≈

Δ

L×

tan θ

/2.

11. The method of claim 2 wherein the mask is made of a transparent material.

12. The method of claim 11 wherein the transparent material comprises a transparent oxide material.

13. The method of claim 2 wherein the layer of material comprises a layer of polysilicon.

14. A method of forming a shielded gate trench (SGT) structure, comprising:

a) filling a trench with polysilicon wherein a polysilicon film is formed over the trench;

b) placing a mask over a portion of the poysilicon;

c) isotropically etching the polysilicon;

d) determining a depth of etching of the polysilicon in the trench based on a characteristic of etching of the polysilicon portion underneath the mask.

15. The method of claim 14 wherein the characteristic of etching is an amount of lateral undercut of the test portion underneath the mask, wherein d) comprises:

measuring the amount of lateral undercut D_L; and

determining the depth of etched length of the polysilicon in the trench from the amount of undercut D_L.

16. The method of claim 15 wherein the mask comprises a portion having an angled shape having a tip angle θ

.

17. The method of claim 16 wherein measuring the amount of lateral undercut D_L comprises measuring a change in length Δ

L of the test portion and determining the amount of lateral undercut D_L from the change in length Δ

L.

18. The method of claim 17, further comprising:

e) placing a marking ruler proximate the test portion, wherein the ruler is adapted to facilitate measurement of the change in length Δ

L of the test portion.

19. The method of claim 17 wherein determining the amount of lateral undercut D_L from the change in length Δ

L comprises approximating the amount of undercut D_L as D_L ≈

Δ

l ×

tan θ

/2.

20. A semiconductor device wafer comprising a test structure wherein said test structure further comprises:

a layer of material comprising a angle-shaped test portion disposed on at least a portion of a surface of the semiconductor wafer; and

a ruler marking on the surface of the semiconductor wafer proximate the test portion,

wherein the ruler marking is adapted to facilitate measurement of a change in length of the test portion.

21. The wafer of claim 20 further comprising a transparent oxide material disposed over a portion of the layer of material.

22. The wafer of claim 20, wherein the angle-shaped test portion comprises a portion having a tip angle θ

.

23. The wafer of claim 20 wherein the layer of material comprises a polysilicon material.

24. The wafer of claim 20, further comprising a trench formed in the substrate, wherein the layer of material fills at least part of the trench.