Liquid crystal display device and fabrication method thereof

• US 20080237596A1
• Filed: 12/18/2007
• Published: 10/02/2008
• Est. Priority Date: 12/19/2006
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: LEE, Chang-Bin, KIM, Dong-Yung
• Granted Patent: US 8,357,937 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136236 using a grey or half tone lithographic process
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask

Abstract

A liquid crystal display (LCD) includes: a first substrate divided into a pixel part and first and second pad parts; a gate electrode and a gate line formed at the pixel part of the first substrate; an active pattern formed as an island on the gate electrode and having a width smaller than the gate electrode; an insulation film formed on the first substrate and having first and second contact holes exposing source and drain regions of the active pattern, respectively; source and drain electrodes formed at the pixel part of the first substrate and electrically connected with the source and drain regions of the active pattern via the first and second contact holes; a data line formed at the pixel part of the first substrate and crossing the gate line to define a pixel region; an etch stopper positioned between the source and drain electrodes and formed as an insulation film; a pixel electrode electrically connected with the drain electrode; and a second substrate attached with the first substrate in a facing manner.

Claims

1. A method for fabricating a liquid crystal display comprising:

dividing a first substrate into a pixel part and first and second pad parts;

forming a gate electrode and a gate line at the pixel part of the first substrate and forming an active pattern as an island on the gate electrode;

forming an insulation film on the first substrate;

removing a portion of the insulation film to form first and second contact holes exposing source and drain regions of the active pattern and forming an etch stopper formed of a first insulation film on the active pattern between the source and drain regions;

forming source and drain electrodes electrically connected with the source and drain regions of the active pattern via the first and second contact holes, and forming a data line crossing the gate line to define a pixel region;

forming a pixel electrode electrically connected with the drain electrode; and

attaching the first and second substrates.

2. The method of claim 1, further comprising:

forming a gate pad line on the first pad part of the first substrate by using a first conductive film used to form the gate electrode.

3. The method of claim 2, further comprising:

forming a data pad line on the second pad part of the first substrate by using a second conductive film used for forming the source and drain electrodes.

4. The method of claim 3, further comprising:

forming a gate pad electrode electrically connected with the gate pad line on the first pad part of the first substrate and a data pad electrode electrically connected with the data pad line on the second pad part of the first substrate, by using a third conductive film used for forming the pixel electrode.

5. The method of claim 4, further comprising:

forming source and drain electrode patterns which have been patterned in the same form as the source and drain electrodes at upper portions of the source and drain electrodes by using the third conductive film.

6. The method of claim 5, wherein a portion of the drain electrode pattern extends to the pixel region to form the pixel electrode.

7. The method of claim 1, wherein the etch stopper is positioned between the source and drain electrodes.

8. The method of claim 1, wherein the gate electrode, the gate line and the active pattern are formed by using a diffraction (slit) mask or a half-tone mask through a single masking process.

9. The method of claim 1, further comprising:

forming an ohmic-contact layer positioned at lower portions of the source and drain electrodes and patterned in the same form as the source and drain electrodes to allow the source and drain regions and the source and drain electrodes to contact ohmically with each other.

10. The method of claim 1, further comprising:

forming a gate insulation film made of an insulation material and patterned in the same form as the active pattern between the gate electrode and the active pattern.

11. A liquid crystal display (LCD) device comprising:

a first substrate divided into a pixel part and first and second pad parts;

a gate electrode and a gate line formed at the pixel part of the first substrate;

an active pattern as an island formed on the gate electrode and having a width smaller than the gate electrode;

an insulation film formed on the first substrate and having first and second contact holes exposing source and drain regions of the active pattern, respectively;

source and drain electrodes formed at the pixel part of the first substrate and electrically connected with the source and drain regions of the active pattern via the first and second contact holes;

a data line formed at the pixel part of the first substrate and crossing the gate line to define a pixel region;

an etch stopper positioned between the source and drain electrodes and formed as an insulation film;

a pixel electrode electrically connected with the drain electrode; and

a second substrate attached with the first substrate in a facing manner.

12. The device of claim 11, further comprising

a gate pad line formed of a first conductive film that forms the gate electrode, and formed on the first pad part of the first substrate.

13. The device of claim 12, further comprising:

a data pad line formed of a second conductive film that forms the source and drain electrodes, and formed on the second pad part of the first substrate.

14. The device of claim 13, further comprising:

a gate pad electrode electrically connected with the gate pad line on the first pad part of the first substrate and a data pad electrode electrically connected with the data pad line on the second pad part of the first substrate, by using a third conductive film used for forming the pixel electrode.

15. The device of claim 14, further comprising:

source and drain electrode patterns, which have been patterned in the same form as the source and drain electrodes, formed at upper portions of the source and drain electrodes by using the third conductive film.

16. The device of claim 15, wherein a portion of the drain electrode pattern extends to the pixel region to form the pixel electrode.

17. The device of claim 11, further comprising:

an ohmic-contact layer positioned at lower portions of the source and drain electrodes and patterned in the same form as the source and drain electrodes to allow the source and drain regions and the source and drain electrodes to contact ohmically with each other.

18. The device of claim 17, wherein the ohmic-contact layer contacts with portions of the source and drain regions, the source and drain electrodes and the insulation film of the active pattern.

19. The device of claim 11, wherein a portion of the pixel electrode overlaps with a portion of the gate line with the insulation film interposed therebetween to form a storage capacitor.

20. The device of claim 11, wherein the gate insulation film is positioned at an upper portion of the gate electrode and patterned in the same form as the active pattern.

21. The device of claim 11, further comprising:

an n+ amorphous silicon thin film pattern formed at a lower portion of the data line and patterned in the same form as the data line.

22. The device of claim 11, further comprising:

a gate insulation film made of an insulation material between the gate electrode and the active pattern and patterned in the same form as the active pattern.