LED with Porous Diffusing Reflector

• US 20080237619A1
• Filed: 03/27/2007
• Published: 10/02/2008
• Est. Priority Date: 03/27/2007
• Status: Active Grant

• Current Assignee: Lumileds LLC (Apollo Global Management, Inc.)
• Original Assignee: Philips Lumileds Lighting Company LLC (Apollo Global Management, Inc.)
• Inventors: Krames, Michael R., Epler, John E., Zhao, Hanmin
• Granted Patent: US 7,601,989 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2933/0091 Scattering means in or on the semiconductor body or semiconductor body package H01L33/22 takes precedence
• CPC Class Codes: H01L 33/16 with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• CPC Class Codes: H01L 33/382 the electrode extending partially in or entirely through the semiconductor body

Abstract

In one embodiment, an AlInGaP LED includes a bottom n-type layer, an active layer, a top p-type layer, and a thick n-type GaP layer over the top p-type layer. The thick n-type GaP layer is then subjected to an electrochemical etch process that causes the n-type GaP layer to become porous and light-diffusing. Electrical contact is made to the p-GaP layer under the porous n-GaP layer by providing metal-filled vias through the porous layer, or electrical contact is made through non-porous regions of the GaP layer between porous regions. The LED chip may be mounted on a submount with the porous n-GaP layer facing the submount surface. The pores and metal layer reflect and diffuse the light, which greatly increases the light output of the LED. Other embodiments of the LED structure are described.

Claims

1. A light emitting diode (LED) structure comprising:

a plurality of LED layers including a first cladding layer, an active layer, and a second cladding layer grown on a growth substrate, the first cladding layer being of a first conductivity type, and the second cladding layer being of an opposite second conductivity type;

a porous semiconductor layer overlying the second cladding layer, the porous semiconductor layer containing pores having a sub-micron minimum diameter, the pores having characteristics that diffuse light generated by the active layer;

a first metal, overlying the porous semiconductor layer, that electrically contacts the second cladding layer such that a majority of current flows between the first metal and the second cladding layer without being substantially conducted through porous areas of the porous semiconductor layer; and

a second metal electrically contacting the first cladding layer.

2. The structure of claim 1 wherein the porous semiconductor layer is a porous GaP based layer.

3. The structure of claim 1 wherein the porous semiconductor layer has openings through which the first metal electrically contacts the second cladding layer without conducting current through the porous semiconductor layer.

4. The structure of claim 1 wherein substantially no current flows through the porous semiconductor layer.

5. The structure of claim 1 wherein the porous semiconductor layer is grown overlying the second cladding layer with at least one intermediate layer of the same conductivity type as the second cladding layer in-between.

6. The structure of claim 1 wherein the layer underlying the porous semiconductor layer is the second cladding layer.

7. The structure of claim 1 wherein the layer underlying the porous semiconductor layer is a layer other than the second cladding layer.

8. The structure of claim 1 wherein the pores extend completely through the porous semiconductor layer.

9. The structure of claim 1 further comprising metal-filled vias through the porous semiconductor layer to allow the first metal to electrically contact the second cladding layer.

10. The structure of claim 1 wherein the porous semiconductor layer comprises regions of porous GaP based material and non-porous GaP based material, wherein surfaces of the regions of porous GaP based material and non-porous GaP based material are substantially coplaner, and wherein the first metal electrically contacts the substantially coplanar surfaces of the regions of porous GaP based material and non-porous GaP based material.

11. The structure of claim 1 wherein the porous semiconductor layer is a wafer bonded substrate.

12. The structure of claim 1 wherein the porous semiconductor layer is a layer that has been grown overlying the second cladding layer.

13. The structure of claim 1 wherein the porous semiconductor layer is n-type and the second cladding layer is p-type.

14. The structure of claim 1 wherein the porous semiconductor layer is n-type and the second cladding layer is n-type.

15. The structure of claim 1 wherein the second cladding layer is grown over the growth substrate after the first cladding layer is grown over the growth substrate.

16. The structure of claim 1 wherein the porous semiconductor layer is an n-type GaP layer.

17. The structure of claim 1 wherein the growth substrate has been removed.

18. The structure of claim 1 further comprising a GaP substrate that replaced the growth substrate.

19. The structure of claim 1 wherein the plurality of LED layers comprises a first AlInGaP layer grown over the growth substrate, an AlInGaP active layer grown over the first AlInGaP layer, and a GaP layer grown over the active layer.

20. The structure of claim 1 wherein the porous semiconductor layer is at least 5 microns thick.

21. The structure of claim 1 wherein the porous semiconductor layer is at least 10 microns thick.

22. The structure of claim 1 wherein the porous semiconductor layer is formed by immersing a non-porous semiconductor layer in an acid bath and running a current through the semiconductor layer.

23. The structure of claim 1 wherein the porous semiconductor layer contains pores extending approximately perpendicular to a surface of the porous semiconductor layer, the pores having a diameter less than a micron, the pores extending completely through the porous semiconductor layer, wherein the pores make up over 10% of a volume of the porous semiconductor layer.

24. The structure of claim 1 wherein the pores extend approximately perpendicular to a surface of the porous semiconductor layer.

25. The structure of claim 1 wherein the LED structure is formed as a flip chip where the first metal and the second metal terminate on a same surface.

26. The structure of claim 1 wherein the first metal and the second metal terminate on different surfaces of the LED structure.

27. The structure of claim 1 further comprising a submount on which a die comprising the plurality of LED layers and the porous semiconductor layer is mounted.

28. A method for forming a light emitting diode (LED) structure comprising:

growing a plurality of LED layers including a first cladding layer, an active layer, and a second cladding layer on a growth substrate, the first cladding layer being of a first conductivity type, and the second cladding layer being of an opposite second conductivity type;

converting a semiconductor layer overlying the second cladding layer to a porous semiconductor layer using an electrochemical etch, the porous semiconductor layer containing pores having a sub-micron minimum diameter, the pores having characteristics that diffuse light generated by the active layer;

forming a first metal, overlying the porous semiconductor layer, that electrically contacts the second cladding layer such that a majority of current flows between the first metal and the second cladding layer without being substantially conducted through porous areas of the porous semiconductor layer; and

forming a second metal electrically contacting the first cladding layer.

29. The method of claim 28 wherein the porous semiconductor layer is a porous GaP based layer.

30. The method of claim 28 wherein the porous semiconductor layer has openings through which the first metal electrically contacts the second cladding layer without conducting current through the porous semiconductor layer.

31. The method of claim 28 wherein substantially no current flows through the porous semiconductor layer.

32. The method of claim 28 further comprising growing the semiconductor layer over the second cladding layer.

33. The method of claim 32 wherein the second cladding layer directly underlies the porous semiconductor layer.

34. The method of claim 28 wherein the pores extend completely through the porous semiconductor layer.

35. The method of claim 28 further comprising forming metal-filled vias through the porous semiconductor layer to allow the first metal to electrically contact the second cladding layer.

36. The method of claim 28 further comprising masking the semiconductor layer to expose portions of the semiconductor layer to the electrochemical etch to make the exposed portions porous, wherein surfaces of regions of porous semiconductor material and non-porous semiconductor material are substantially coplaner, and wherein the first metal electrically contacts the substantially coplanar surfaces of the regions of porous semiconductor material and non-porous semiconductor material.

37. The method of claim 28 wherein the semiconductor layer is a wafer bonded substrate.

38. The method of claim 28 wherein the porous semiconductor layer is n-type and the second cladding layer is p-type.

39. The method of claim 28 wherein the porous semiconductor layer is n-type and the second cladding layer is n-type.

40. The method of claim 28 wherein the second cladding layer is grown over the growth substrate after the first cladding layer is grown over the growth substrate.

41. The method of claim 28 wherein the porous semiconductor layer is an n-type GaP layer.

42. The method of claim 28 further comprising removing the growth substrate.

43. The method of claim 28 wherein the plurality of LED layers comprises a first AlInGaP layer grown over the growth substrate, an AlInGaP active layer grown over the first AlInGaP layer, and a GaP layer grown over the active layer.

44. The method of claim 28 wherein the porous semiconductor layer is formed by immersing a non-porous semiconductor layer in an acid bath and running a current through the semiconductor layer.

45. The method of claim 28 wherein the porous semiconductor layer contains pores extending approximately perpendicular to a surface of the porous semiconductor layer, the pores having a diameter less than a micron, the pores extending completely through the porous semiconductor layer, wherein the pores make up over 10% of a volume of the porous semiconductor layer.