Systems and methods for digital delayed array transmitter architecture with beam steering capability for high data rate

• US 20080240170A1
• Filed: 03/29/2007
• Published: 10/02/2008
• Est. Priority Date: 03/29/2007
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Rohani, Nader, Ravi, Ashoke, Elmala, Mostafa
• Granted Patent: US 8,090,052 B2
• Time in Patent Office: Days
• US Class Current: 370/517
• CPC Class Codes: H01Q 3/2682 Time delay steered arrays

Abstract

Embodiments include systems and methods for fine control of beam steering for wide band wireless applications using a phased array of antenna elements. In one embodiment, a digitally controlled delay line delays the signal output from a modulator in each branch of multiple branches feeding multiple antennas in an array. An output of the digital delay line is input to a digital to analog converter. A second digital delay line also delays the signal within the digital to analog converter. The manner of implementation of the delays enables accurate production of a steered beam at a high data rate.

Claims

1. A method for beam steering in a wide band wireless system, comprising:

distributing a digital signal from a modulator to each of a plurality of branches, each branch leading to an antenna in array of antennas;

controllably delaying by inverters the digital signal received from a modulator and passing the signal to a digital to analog converter; and

controllably delaying by inverters a digital signal processed by the digital to analog converter to achieve beam steering of a wide band signal.

2. The method of claim 1, further comprising delaying an analog signal output by the digital to analog converter.

3. The method of claim 1, wherein controllably delaying by inverters comprises controlling by a delay locked loop the delay of the inverters.

4. The method of claim 3, further comprising delaying an analog signal output by the digital to analog converter.

5. The method of claim 3, wherein a controllable delay is implemented by programmable control of a number of inverters in a delay line.

6. The method of claim 1, wherein a delay by an inverter is on the order of tens of pico-seconds.

7. The method of claim 1, wherein a controllable delay is implemented by programmable control of a number of inverters in a delay line.

8. The method of claim 1, wherein a controllable delay is selected by a multiplexer.

9. A system for beam steering in a wide band wireless system, comprising:

a modulator to output an information bearing digital signal, to a plurality of branches, each branch leading to an antenna in array of antennas;

a controllable delay line of inverters to controllably delay the digital signal received from the modulator and to pass the signal to a digital to analog converter; and

a controllable delay line of inverters to delay the a digital signal processed by the digital to analog converter to achieve beam steering of a wide band signal.

10. The system of claim 9, further comprising delay circuitry to delay an analog signal output by the digital to analog converter.

11. The system of claim 9, further comprising a multiplexer for selecting an amount of delay.

12. The system of claim 9, wherein a controllable delay line comprises a delay locked loop.

13. The system of claim 12, further comprising delay circuitry to delay an analog signal output by the digital to analog converter.

14. The system of claim 12, wherein a controllable delay line is implemented by programmable control of a number of inverters in the delay line.

15. The system of claim 9, wherein a delay by an inverter is on the order of tens of pico-seconds.

16. The system of claim 9, wherein a controllable delay is implemented by programmable control of a number of inverters in the delay line.