Flexible architecture and instruction for advanced encryption standard (AES)
First Claim
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1. An apparatus comprising:
- a key scheduler, the key scheduler to generate a round key for an aes round associated with an aes round key operation based on a received key andaes round logic to perform one of a plurality of aes round operations to compute a result of an aes operation on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or the result of the aes operation.
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Abstract
A flexible aes instruction set for a general purpose processor is provided. The instruction set includes instructions to perform a “one round” pass for aes encryption or decryption and also includes instructions to perform key generation. An immediate may be used to indicate round number and key size for key generation for 128/192/256 bit keys. The flexible aes instruction set enables full use of pipelining capabilities because it does not require tracking of implicit registers.
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Citations
26 Claims
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1. An apparatus comprising:
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a key scheduler, the key scheduler to generate a round key for an aes round associated with an aes round key operation based on a received key and aes round logic to perform one of a plurality of aes round operations to compute a result of an aes operation on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or the result of the aes operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method comprising:
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generating a round key for an aes round associated with an aes round key operation based on a received key; performing the aes round operation on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or the result of the aes operation. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. The method of claim 20, wherein the register file includes a plurality of 128-bit registers.
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21. An article including a machine-accessible medium having associated information, wherein the information, when accessed, results in a machine performing:
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generating a round key for an aes round associated with an aes round key operation based on a received key; and performing the aes round operation on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or the result of the aes operation. - View Dependent Claims (22, 23)
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24. A system comprising:
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a dynamic random access memory to store data and instructions; and a processor coupled to said memory to execute the instructions, the processor comprising; a key scheduler, the key scheduler to generate a round key for an aes round associated with an aes round key operation based on a received key; and aes round logic to perform one of a plurality of aes round operations to compute a result of an aes operation on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or the result of the aes operation. - View Dependent Claims (25, 26)
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Specification