Method for implementing diffusion barrier in 3D memory
First Claim
Patent Images
1. A method of forming a memory cell, comprising:
- filling a trench in a first dielectric with a first conductor;
recessing the first conductor in the first dielectric;
filling the recess with a first diffusion barrier;
forming a pillar over the first diffusion barrier; and
forming a second conductor over the pillar,the pillar having a first electrical conductivity before a program voltage is applied to the cell and a second electrical conductivity after a program voltage is applied to the cell.
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Abstract
One or more diffusion barriers are formed around one or more conductors in a three dimensional or 3D memory cell. The diffusion barriers allow the conductors to comprise very low resistivity materials, such as copper, that may otherwise out diffuse into surrounding areas, particularly at elevated processing temperatures. Utilizing lower resistivity materials allows device dimension to be reduced by mitigating increases in resistance that occur when the size of the conductors is reduced. As such, more cells can be produced over a given area, thus increasing the density and storage capacity of a resulting memory array.
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Citations
25 Claims
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1. A method of forming a memory cell, comprising:
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filling a trench in a first dielectric with a first conductor; recessing the first conductor in the first dielectric; filling the recess with a first diffusion barrier; forming a pillar over the first diffusion barrier; and forming a second conductor over the pillar, the pillar having a first electrical conductivity before a program voltage is applied to the cell and a second electrical conductivity after a program voltage is applied to the cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of forming a memory cell, comprising:
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filling a trench in a first dielectric with a first conductor; forming a pillar over the first conductor; and forming a second conductor over the pillar, the pillar not comprising germanium or a germanium alloy, the pillar having a first electrical conductivity before a program voltage is applied to the cell and a second electrical conductivity after a program voltage is applied to the cell. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method of forming a memory cell, comprising:
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filling a trench in a first dielectric with a first copper conductor; forming a layer of semiconductor material over the first conductor and the first dielectric; forming a layer of antifuse material over the layer of semiconductor material; forming a layer of hardmask material over the layer of antifuse material; patterning the layer of hardmask material, layer of antifuse material and layer of semiconductor material to form a pillar; and forming a second copper conductor over the pillar, the antifuse being in a first conductivity state before a program voltage is applied to the cell and a second conductivity state after a program voltage is applied to the cell. - View Dependent Claims (20, 21, 22, 23, 24, 25)
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Specification