Integrated Circuit and Method For Transaction Retraction
First Claim
1. Integrated circuit having a plurality of processing modules (I, T), wherein at least one first processing module (I) issues at least one transaction towards at least one second processing module (T), comprising:
- at least one first transaction retraction unit (TRU1) for indicating the allowance to said at least one first of said processing modules (I) to retract said at least one transaction according to the state of said second processing module (T).
2 Assignments
0 Petitions
Accused Products
Abstract
An integrated circuit having a plurality of processing modules (I, T) is provided. At least one first processing module (I) issues at least one transaction towards at least one second processing module (T). Said integrated circuit further comprises at least one first transaction retraction unit (TRU1) for indicating an allowance to said at least one first of said processing modules (I) to retract said at least one transaction according to the sate of said second processing module (T).
3 Citations
8 Claims
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1. Integrated circuit having a plurality of processing modules (I, T), wherein at least one first processing module (I) issues at least one transaction towards at least one second processing module (T), comprising:
at least one first transaction retraction unit (TRU1) for indicating the allowance to said at least one first of said processing modules (I) to retract said at least one transaction according to the state of said second processing module (T). - View Dependent Claims (2, 3, 4, 5, 6)
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7. Method for transaction retraction in an integrated circuit having a plurality of processing modules (I, T), comprising the steps of:
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issuing at least one transaction by at least one first processing module (I) towards at least one second processing module (T), indicating the allowance to retract said at least one transaction according to the state of said second processing module (T) to said at least one first of said processing modules (I).
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8. Data processing system, comprising
a plurality of processing modules (I, T), wherein at least one first processing module (I) issues at least one transaction towards at least one second processing module (T), comprising: at least one first transaction retraction unit (TRU1) for indicating an allowance to said at least one first of said processing modules (I) to retract said at least one transaction according to the state of said second processing module (T).
Specification