Non-Volatile Memory with Soft Bit Data Transmission for Error Correction Control

• US 20080244360A1
• Filed: 03/31/2007
• Published: 10/02/2008
• Est. Priority Date: 03/31/2007
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Chin, Henry, Zhao, Dengtao, Mokhlesi, Nima
• Granted Patent: US 7,966,546 B2
• Time in Patent Office: Days
• US Class Current: 714/758
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1111 Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms

Abstract

Data stored in non-volatile storage is decoded using iterative probabilistic decoding. An error correcting code such as a low density parity check code may be used. In one approach, initial reliability metrics, such as logarithmic likelihood ratios, are used in decoding sensed states of a set of non-volatile storage element. The decoding attempts to converge by adjusting the reliability metrics for bits in code words which represent the sensed state. Soft data bits are read from the memory if the decoding fails to converge. Initial reliability metric values are provided after receiving the hard read results and at each phase of the soft bit operation(s). In one embodiment, a second soft bit is read from the memory using multiple subsets of soft bit compare levels. While reading at the second subset of compare levels, decoding can be performed based on the first subset data.

Claims

1. A non-volatile memory system, comprising:

a set of non-volatile storage elements;

managing circuitry in communication with the set of non-volatile storage elements, the managing circuitry reads the set of non-volatile storage elements by;

reading user data from the set of non-volatile storage elements using a first plurality of read compare points, each compare point corresponding to a programmable state of the storage elements;

reading a set of soft data from the set of storage elements at a higher bit resolution than said user data using a second plurality of read compare points having a larger number of read compare points than the first plurality; and

decoding the user data using a first subset of the soft data while reading to determine a second subset of the soft data.

2. A non-volatile memory system according to claim 1, wherein the managing circuitry:

decodes the user data without the set of soft data prior to reading the set of soft data from the set of storage elements;

wherein reading the set of soft data is performed in response to a determination that decoding without the set of soft data is not successful.

3. A non-volatile memory system according to claim 2, wherein the managing circuitry:

decodes the user data using the first subset and the second subset of soft data after reading to determine the second subset of the soft data.

4. A non-volatile memory system according to claim 3, wherein:

reading to determine the second subset of soft data is performed in response to a determination that decoding using the first subset is not successful.

5. A method according to claim 3, wherein:

the set of soft data is a second set of soft data;

the managing circuitry reads a first set of soft data from the set of storage elements using a third plurality of read compare points prior to reading the second set of soft data and decodes the user data using the first set of soft data;

reading the second set of soft data is performed in response to a determination that decoding using the first set of soft data is not successful.

6. A non-volatile memory system according to claim 5, wherein:

decoding the user data without the first set of soft data includes accessing a first table of reliability metrics;

decoding the user data using the first set of soft data includes accessing a second table of reliability metrics;

decoding the user data using the first subset of the second set of soft data includes accessing a third table of reliability metrics;

decoding the user data using the first and second subsets of the second set of soft data includes accessing a fourth table of reliability metrics.

7. A non-volatile memory system according to claim 1, wherein:

the second plurality of read compare points includes a first subset of read compare points used to determine the first subset of data and a second subset of read compare points used after the first subset to determine the second subset of data;

the first subset of read compare points includes one or more read compare points associated with a lower threshold voltage portion of its corresponding programmable state and one or more read compare points associated with an upper threshold voltage portion of its corresponding programmable state;

the second subset of read compare points includes one or more read compare points associated with a lower threshold voltage portion of its corresponding programmable state and one or more read compare points associated with an upper threshold voltage portion of its corresponding programmable state.

8. A non-volatile memory system according to claim 1, wherein:

the second plurality of read compare points includes a first subset of read compare points used to determine the first subset of data and a second subset of read compare points used after the first subset to determine the second subset of data;

each read compare point of the first subset is associated with a lower threshold voltage portion of its corresponding programmable state; and

each read compare point of the second subset is associated with an upper threshold voltage portion of its corresponding programmable state.

9. A non-volatile memory system according to claim 1, wherein:

decoding the user data includes performing one or more parity checks.

10. A non-volatile memory system according to claim 1, further comprising:

providing the first subset of data from a memory chip to an error correction controller prior to reading the second subset of data.

11. A non-volatile memory system according to claim 1, wherein:

the read compare points are read reference threshold voltages.

12. A non-volatile memory system according to claim 1, wherein:

the read compare points are read reference currents.

13. A non-volatile memory system according to claim 1, wherein:

reading includes at least one of voltage sensing and current sensing.

14. A non-volatile memory system according to claim 1, wherein:

decoding the user data includes iterative probabilistic decoding.

15. A non-volatile memory system according to claim 1, wherein:

the user data includes one or more parity bits.

16. A non-volatile memory system according to claim 1, wherein:

the set of non-volatile storage elements is a set of NAND flash storage elements.

17. A non-volatile memory system according to claim 1, wherein:

the set of non-volatile storage elements is a set of multi-state flash storage elements.

18. A non-volatile memory system according to claim 1, wherein the managing circuitry includes a controller.

19. A non-volatile memory system according to claim 1, wherein the managing circuitry includes one or more column decoders, one or more row decoders, and one or more state machines.

21. The non-volatile memory system of claim 18, wherein the one or more read operations further include:

determining a third set of data based on the second subset of read compare points; and

iteratively decoding the first set of data using the third set of data and the second set of data.

22. The non-volatile memory system of claim 19, wherein the set of read compare points is a second set of read compare points, the one or more operations further include:

providing a first set of read compare points for the plurality of non-volatile storage elements prior to providing the second set of read compare points; and

determining the first set of data based on the first set of read compare points.

24. The non-volatile memory system of claim 18, wherein the one or more operations further include:

iteratively decoding the first set of data prior to providing the second set of read compare points;

wherein providing the second set of read compare points is performed in response to a determination that iteratively decoding the first set of data is not successful.

25. The non-volatile memory system of claim 18, wherein:

iteratively decoding the first set of data using the second set of data includes accessing reliability metrics based on the first set of data and the second set of data.

27. The non-volatile memory system of claim 24, wherein:

iteratively decoding the first set of data includes accessing a table of logarithmic likelihood ratios.

28. The non-volatile memory system of claim 25, wherein accessing the table includes, for each storage element of the plurality:

determining from the table an initial logarithmic likelihood ratio for the storage element based on its data from the first set of data and its data from the second set of data.

29. The non-volatile memory system of claim 1, wherein:

the managing circuitry includes at least one of a controller and a state machine.

20. A non-volatile memory system, comprising:

a plurality of non-volatile storage elements; and

managing circuitry in communication with the set of non-volatile storage elements, the managing circuitry performs one or more operations that include;

providing a set of read compare points for the plurality of non-volatile storage elements as part of an error correction control process while reading a first set of data from the storage elements, the set of read compare points including a first subset of read compare points having one read compare point corresponding to each programmable state of the storage elements and a second subset of read compare points having one read compare point corresponding to each programmable state of the storage elements, wherein providing includes providing the first subset prior to the second subset,

determining a second set of data based on the first subset of read compare points, and

iteratively decoding the first set of data using the second set of data while providing the second subset of read compare points for the plurality of non-volatile storage elements.

23. The non-volatile memory system of claim 20, where the one or more operations further include, prior to providing the second set of read compare points:

providing a third set of read compare points including a single read compare point corresponding to each programmable state of the storage elements;

determining a fourth set of data based on the third set of read compare points;

iteratively decoding the first set of data based on the fourth set of data while providing the first subset of read compare points to the storage elements.

26. The non-volatile memory system of claim 23, wherein:

the reliability metrics include logarithmic likelihood ratios.

30. A non-volatile memory system, comprising:

a plurality of non-volatile storage elements;

managing circuitry in communication with the plurality of non-volatile storage elements, wherein the managing circuitry reads the non-volatile storage elements by;

performing a read operation on a plurality of non-volatile storage elements using a first set of read compare points having a single compare point corresponding to each potential state of programming for said storage elements,

providing a first set of data for said storage elements based on said read operation to correction circuitry,

performing probabilistic decoding to determine a state of each non-volatile storage element based on said read operation,

performing a second read operation on the plurality of non-volatile storage elements using a second set of read compare points having a first compare point and a second compare point corresponding to each potential state, wherein said second read operation senses at said first compare points prior to sensing at said second compare points.

31. A non-volatile memory system, comprising:

a plurality of non-volatile storage elements;

managing circuitry in communication with the plurality of non-volatile storage elements, the managing circuitry reads the non-volatile storage elements by;

providing a first logarithmic likelihood ratio table to iteratively decode a set of data read from a plurality of non-volatile storage elements using a first set of compare points,

providing a second logarithmic likelihood ratio table to iteratively decode the first set of data using a second set of data read from the storage elements using a second set of compare points,

providing a third logarithmic likelihood ratio table to iteratively decode the first set of data using the second set of data and a third set of data read from the storage elements,

providing a fourth logarithmic likelihood ratio table to iteratively decode the first set of data using the second set of data, the third set of data, and a fourth set of data read from the storage elements.

32. A non-volatile memory system, comprising:

a set of non-volatile storage elements; and

managing circuitry in communication with the set of non-volatile storage elements that reads the set of storage elements by;

sensing a threshold voltage of a set of non-volatile storage elements using a first plurality of reference levels corresponding to a plurality of programmable states of the storage elements,

iteratively decoding a first set of data resulting from sensing at the first plurality of reference levels,

sensing, while iteratively decoding the first set of data, the threshold voltage of the set using a second plurality of reference levels corresponding to the plurality of programmable states by sensing at a first subset of reference levels equal in number to the first plurality prior to sensing at a second subset of reference levels equal in number to the first plurality,

iteratively decoding the first set of data using a second set of data resulting from sensing at the first subset of reference levels while sensing at the second subset of reference levels,

iteratively decoding the first set of data using the second set of data and a third set of data resulting from sensing at the second subset of reference levels.