MODEL GENERATION METHOD AND MODEL GENERATION APPARATUS OF SEMICONDUCTOR DEVICE

• US 20080244478A1
• Filed: 03/19/2008
• Published: 10/02/2008
• Est. Priority Date: 03/30/2007
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Moriyama, Osamu
• Granted Patent: US 7,856,608 B2
• Time in Patent Office: Days
• US Class Current: 716/4
• CPC Class Codes: G06F 2119/10 Noise analysis or noise optimisation
• CPC Class Codes: G06F 30/3312 Timing analysis
• CPC Class Codes: G06F 30/3315 using static timing analysis [STA]
• CPC Class Codes: G06F 30/36 Circuit design at the analogue level

Abstract

A model generation method for generating a semiconductor device model used for power supply noise analysis, is performed by, calculating noise values for various circuit elements based on current source noise waveforms calculated in accordance with a current flowing from a power supply when a state of the elements changes, determining the time when the change of state of the elements causing the current source noise occurs in relation to successive timing windows each having a predetermined time width, and calculating noise by unit time and adding up for each divided unit time the noise value calculated for all elements whose timing window is present in the unit time, wherein a timing determination unit determines the worst case and other noise generation timing based on the noise generated in each unit time.

Claims

1. A model generation method for generating a semiconductor device model used for power supply noise analysis, comprising:

calculating a noise value representing a noise amount based on current source noise waveforms by determining the current source noise waveforms calculated in accordance with a current flowing from a power supply when a state of elements, which are arranged in a semiconductor device to be analyzed and cause a change of state leading to noise generation, changes;

acquiring timing when the change of state of the elements causing the current source noise occurs by a static timing analysis in a timing window having a predetermined time width;

calculating noise by unit time by dividing an analysis time in which a transient analysis is performed into unit times and adding up for each divided unit time the noise value calculated for all elements whose timing window is present in the unit time; and

determining the total noise in each unit time.

2. The model generation method according to claim 1, wherein

the noise value is calculated from a peak value of the current source noise waveforms, a width of the current source noise waveforms in addition to the peak value, or a value of inclination of the current source noise waveforms.

3. The model generation method according to claim 1, wherein

the total amount of noise generated in each unit time is determined, and the unit times are organized in descending order based on the total noise in each unit time.

4. The model generation method according to claim 1, wherein

the total noise by unit time is calculated by creating a noise value table by unit time in which the element whose timing window is present and the noise by unit time are associated for each unit time, storing the noise value table in a storage unit, and determining the noise generation timing based on the noise value table by unit time stored in the storage unit.

5. The model generation method according to claim 1, wherein

the noise by unit time is calculated and the noise generation timing is determined for each divided area after dividing the semiconductor device into areas.

6. A model generation apparatus for generating a semiconductor device model used for power supply noise analysis, comprising:

a noise value calculation unit for calculating a noise value representing a noise amount based on current source noise waveforms by determining the current source noise waveforms calculated in accordance with a current flowing from a power supply when a state of elements, which are arranged in a semiconductor device to be analyzed and cause a change of state leading to noise generation, changes;

a timing window acquisition unit for acquiring timing when the change of state of the elements causing the current source noise occurs by a static timing analysis in a timing window having a predetermined time width;

a noise calculation unit for calculating noise by unit time by dividing an analysis time in which a transient analysis is performed into unit times and adding up for each divided unit time the noise value calculated for all elements whose timing window is present in the unit time; and

a timing determination unit for determining the noise generated in each of the unit times.

7. The model generation apparatus according to claim 6, wherein

the noise calculation unit calculates the noise value from a peak value of the current source noise waveforms, a width of the current source noise waveforms in addition to the peak value, or a value of inclination of the current source noise waveforms.

8. The model generation apparatus according to claim 6, wherein

the total amount of noise generated in each unit time is determined, and the unit times are organized in descending order based on of the total noise in each unit time.

9. The model generation apparatus according to claim 6, wherein

the total noise calculation unit by unit time creates a noise value table by unit time in which the element whose timing window is present and the noise by unit time are associated for each unit time and stores the noise value table in a storage unit, the timing determination unit determining the noise generation timing based on the noise value table by unit time stored in the storage unit.

10. The model generation apparatus according to claim 6, wherein

the noise calculation unit and the timing determination unit divide the semiconductor device into areas and perform respective processing for each divided area.

11. A storage medium storing a model generation program for generating a semiconductor device model used for power supply noise analysis, wherein the program causes a computer to execute model generation steps, the model generation steps comprising:

calculating a noise value representing a noise amount based on current source noise waveforms by determining the current source noise waveforms calculated in accordance with a current flowing from a power supply when a state of elements, which are arranged in a semiconductor device to be analyzed and cause a change of state leading to noise generation, changes;

acquiring timing when the change of state of the elements causing the current source noise occurs by a static timing analysis in a timing window having a predetermined time width;

calculating noise by unit time by dividing an analysis time in which a transient analysis is performed into unit times and adding up for each divided unit time the noise value calculated for all elements whose timing window is present in the unit time; and

determining the noise in each unit time.

12. A power supply noise analysis method for use when creating a semiconductor device model to be analyzed and performing power supply noise analysis, the method comprising:

creating a mesh model by modeling a wiring network of the semiconductor device;

creating a package model by modeling a power supply terminal and a package of the semiconductor device;

creating a supply voltage source model by modeling a voltage source;

creating a capacity cell model by modeling a capacity cell for noise removal;

creating a current source noise waveform model by determining current source noise waveforms calculated in accordance with a current flowing from a power supply when a state of elements, which are arranged in the semiconductor device to be analyzed and cause a change of state leading to noise generation, changes, calculating a noise value representing a noise amount based on the current source noise waveforms, determining when the change of state of the elements causing the current source noise occurs by a static timing analysis of timing windows each having a predetermined time width, dividing an analysis time in which a transient analysis is performed into unit times, calculating noise by unit time by adding up for each divided unit time the noise value calculated for all elements whose timing window is present in the unit time, and determining the total noise in each of the unit times;

creating a non-operating transistor model by modeling elements in a non-operating state; and

analyzing power supply noise using the semiconductor device model after creating the semiconductor device model by combining the mesh model, package model, supply voltage source model, current source noise waveform model, and non-operating transistor model.