MONOLITHIC INTEGRATED CIRCUIT ARRANGEMENT

• US 20080245543A1
• Filed: 04/21/2008
• Published: 10/09/2008
• Est. Priority Date: 10/21/2005
• Status: Abandoned Application

• Current Assignee: Atmel Duisburg GmbH (Microchip Technology Incorporated)
• Original Assignee: Atmel Duisburg GmbH (Microchip Technology Incorporated)
• Inventors: Tempel, Ralf, El Rai, Samir
• Application Number:
  US12/107,057
• Publication Number:
  US 20080245543A1
• Time in Patent Office: Days
• US Class Current: 174/32
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 27/40 Structural association with built-in electric component, e.g. fuse
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5225 Shielding layers formed together with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/0611 integrated circuits having a two-dimensional layout of components without a common active region
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A monolithic integrated circuit arrangement is provided that includes a first circuit component, which is formed as a differentially supplied coil and has at least one conductor loop encompassing an interior region, and at least one additional circuit component. According to an embodiment of the invention, the additional circuit component of the circuit arrangement is disposed in the interior region.

Claims

1. A monolithic integrated circuit arrangement comprising:

a first circuit component that is formed as a differentially supplied coil and has at least one conductor loop encompassing an interior region; and

at least one additional circuit component being disposed in the interior region.

2. The circuit arrangement according to claim 1, wherein the additional circuit component has one or more passive elements, particularly capacitive elements.

3. The circuit arrangement according to claim 2, wherein the capacitive elements are formed as a configurable capacitor matrix and/or as capacitance diodes.

4. The circuit arrangement according to claim 1, wherein the additional circuit component has one or more active elements, particularly transistors.

5. The circuit arrangement according to claim 1, wherein different conductor sections of the differentially supplied coil, particularly different conductor loops of the coil, are disposed in different metallization levels of a substrate accommodating the circuit arrangement.

6. The circuit arrangement according to claim 1, further comprising a shielding device disposed in the interior region of the conductor loop and which extends at least partially between at least one conductor loop of the coil and the additional circuit component.

7. The circuit arrangement according to claim 1, wherein the coil has at least one pair of legs, each of which being symmetric to one another.

8. The circuit arrangement according to claim 7, wherein the additional circuit component and/or the control lines assigned to the additional circuit component are disposed in an area of and axis of symmetry of the coil, said axis running between the legs.

9. A monolithic integrated circuit having at least one circuit arrangement according to claim 1.

10. The circuit according to claim 9, wherein the integrated circuit includes at least two metallization levels.