SYSTEM AND METHOD FOR POWER CONTROLLER

• US 20080246444A1
• Filed: 05/17/2007
• Published: 10/09/2008
• Est. Priority Date: 04/05/2007
• Status: Active Grant

• Current Assignee: On-Bright Electronics (Shanghai) Co., Ltd. (Orthosie Investment Holdings Ltd.)
• Original Assignee: On-Bright Electronics (Shanghai) Co., Ltd. (Orthosie Investment Holdings Ltd.)
• Inventors: Ye, Jun, Lin, Yuan, Fang, Lieyi, Shao, Yunqi
• Granted Patent: US 7,514,912 B2
• Time in Patent Office: Days
• US Class Current: 323/207
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

System and method for power controller. According to an embodiment, the present invention provides a power factor correction apparatus. The apparatus includes a multiplier component that is configured to process a first input signal and a second input signal. For example, the first input signal is associated with a rectified alternating current signal, and the second input signal is associated with an error signal. The multiplier component further is configured to generate a first output signal based on the first input signal and the second input signal. The apparatus also includes a comparator component that is configured to process a third input signal and fourth input signal. The third input signal is associated with the first output signal. The comparator component is further configured to generate a second output signal based on the third input signal and the fourth input signal.

Claims

1. A power factor correction apparatus comprising:

a multiplier component being configured to process a first input signal and a second input signal, the first input signal being associated with a rectified alternating current signal, the second input signal being associated with an error signal, the multiplier component further being configured to generate a first output signal based on the first input signal and the second input signal;

a comparator component being configured to process a third input signal and fourth input signal, the third input signal being associated with the first output signal, the comparator component further being configured to generate a second output signal based on the third input signal and the fourth input signal;

a timing component being configured to receive a fifth input signal at a first time and generate a third output signal based on the fifth input signal at a second time;

a switch controller being configured to generate a first control signal based on at least second output signal and the third output signal, the first control signal being capable of causing a switch to turn off,

wherein;

the fifth input signal is associated with the control signal;

the time difference between the first time and the second time is predetermined based on at a characteristic of the apparatus.

2. The apparatus of claim 1 wherein the fourth signal is associated with a reference signal.

3. The apparatus of claim 1 wherein the time difference is associated with an audible noise frequency.

4. The apparatus of claim 1 wherein the time difference less than a half period, the half period being associated with an audible noise frequency.

5. The apparatus of claim 1 wherein the timing component comprises a capacitor, the capacitor being associated with the time difference.

6. The apparatus of claim 1 further comprising a gate driver.

7. The apparatus of claim 1 further comprising a zero-current detector.

8. The apparatus of claim 1 wherein:

the switch controller comprises a flip-flop;

the apparatus further comprising a zero-current detector, the zero-current detector being configured to provide a second control signal, the second control signal being capable of set the flip-flop.

9. The apparatus of claim 1 wherein the switch is a power switch, the power switch being capable of turning of a power system.

10. The apparatus of claim 1 wherein the switch controller comprises a flip-flop.

11. A system for converting power, the system comprising:

a boost apparatus;

a rectifying component;

a power factor correction component including a multiplier component being configured to process a first input signal and a second input signal, the first input signal being associated with a rectified alternating current signal, the second input signal being associated with an error signal, the multiplier component further being configured to generate a first output signal based on the first input signal and the second input signal;

a comparator component being configured to process a third input signal and fourth input signal, the third input signal being associated with the first output signal, the comparator component further being configured to generate a second output signal based on the third input signal and the fourth input signal;

a timing component being configured to receive a fifth input at a first time and generate a third output signal based on the fifth input signal at a second time;

a switch controller being configured to generate a first control signal based on at least second output signal and the third output signal, the first control signal being capable of causing a switch to turn off,

wherein;

the fifth input signal is associated with the control signal;

the time difference between the first time and the second time is predetermined based on at a characteristic of the apparatus.

12. The system of claim 11 further comprises a diode bridge.

13. The system of claim 11 further comprises an input inductor.

14. The system of claim 11 further comprises an output capacitor.

15. The system of claim 11 further comprises a multiplier.

16. A method for providing power factor correction comprising:

providing a multiplier component;

receiving a first input signal and a second input signal by the multiplier component, the first input signal being associated with a rectified alternating current signal by, the second input signal being associated with an error signal;

generating a first output signal based on the first input signal and the second input signal by the multiplier component;

processing a third input signal and fourth input signal with a comparator, the third input signal being associated with the first output signal;

generating a second output signal based on the third input signal and the fourth input signal;

receiving a fifth input signal at a first time;

generating a third output signal at the second time based on the fifth input signal;

receiving the second output signal and the third output signal by a switch controller;

generating a first control signal by the switch controller based on at least the second output signal and the third output signal, the first control signal being capable of causing a switch to turn off,

wherein;

the fifth input signal is associated with the control signal;

the time difference between the first time and the second time is predetermined based on at a characteristic of the apparatus.

17. The method of claim 16 wherein the fourth signal comprises a reference signal.

18. The method of claim 16 wherein the time difference is associated with an audio frequency range.

19. The method of claim 16 wherein the comparator compares the third input signal with the fourth input signal.