Common mode feedback for large output swing and low differential error

• US 20080246543A1
• Filed: 04/03/2007
• Published: 10/09/2008
• Est. Priority Date: 04/03/2007
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Trifonov, Dimitar T., Gardner, Marco A.
• Granted Patent: US 7,592,867 B2
• Time in Patent Office: Days
• US Class Current: 330/253
• CPC Class Codes: H03F 2203/45082 the common mode signal being taken or deducted from the one or more outputs of the differential amplifier
• CPC Class Codes: H03F 2203/45101 Control of the DC level being present
• CPC Class Codes: H03F 2203/45292 the AAC comprising biasing means controlled by the signal
• CPC Class Codes: H03F 2203/45681 the LC comprising offset compensating means
• CPC Class Codes: H03F 3/45192 Folded cascode stages
• CPC Class Codes: H03F 3/45632 in differential amplifiers with FET transistors as the active amplifying circuit H03F3/4578 takes precedence

Abstract

A differential amplifier includes a differential input pair (2A) coupled to a folded cascode stage (2B) and a common mode feedback circuit (34) including a tracking circuit (30A) coupled to first (Vout⁻) and second (Vout⁺) outputs of the folded cascode stage (2B). The first and second outputs are coupled to first terminals of first (31A) and second (31B) tracking capacitors which have second terminals on which a first common mode output signal (V_CM1) is produced and also are coupled to first terminals of third (32A) and fourth (32B) tracking capacitors, respectively, which have second terminals on which a second common mode output signal (V_CM2) is produced. The first and third tracking capacitors are discharged by first (27A) and second (27B) switches that directly couple the first and second outputs to first and second inputs of a common mode feedback amplifier (4). A desired common mode output voltage (V_CM-IN) is applied to a third input of the common mode feedback amplifier. The switches are opened to cause the first and second common mode output voltages to be generated, causing a common mode feedback control signal (V_CMFB) to be generated for biasing the folded cascode stage.

Claims

1. A differential amplifier comprising:

(a) a differential input transistor pair including first and second input transistors each having a first electrode, a second electrode, and a control electrode;

(b) a first folded cascode stage including first, second, third and fourth current source transistors and first and second cascode transistors each having a first electrode, a second electrode, and a control electrode, first and second summing junctions coupled to the second electrodes of the first and second input transistors, respectively, and first and second outputs conducting first and second output signals, respectively, the second electrodes of the first and second current source transistors being coupled by the first and second summing junctions, respectively, to the first electrodes of the first and second cascode transistors, the second electrodes of the first and second cascode transistors being coupled to the first and second outputs, respectively, and the second electrodes of the third and fourth current source transistors being coupled to the first and second outputs, respectively; and

(c) common mode feedback circuitry including

(1) a tracking circuit coupled to the first and second outputs for producing first and second common mode output signals in response to the first and second output signals, and

(2) an auxiliary amplifier stage including a differential input stage including third, fourth and fifth input transistors, gates of the third and fourth input transistors being coupled to receive the first and second common mode output signals, respectively, a gate of the fifth input transistor being coupled to receive a desired common mode voltage, drains of the third and fourth input transistors being coupled to a first input of a secondary amplifying stage having an output, a drain of the fifth input transistor being coupled to a second input of the secondary amplifying stage, the output of the secondary amplifying stage coupling a common mode feedback control signal to bias the control electrodes of the third and fourth current source transistors.

2. The differential amplifier of claim 1 wherein the tracking circuit includes a first section coupled to receive both the first and second output signals for producing the first common mode output signal and a second section coupled to receive both the first and second output signals for producing the second common mode output signal.

3. The differential amplifier of claim 2 wherein the first section includes first and second tracking capacitors having first terminals connected to produce the first common mode output signal and a first switch coupled across the first tracking capacitor, a second terminal of the first tracking capacitor being coupled to receive the first output signal, a second terminal of the second tracking capacitor being coupled to receive the second output signal, and wherein the second section includes third and fourth tracking capacitors having first terminals connected to produce the second common mode output signal and a second switch coupled across the third tracking capacitor, a second terminal of the third tracking capacitor being coupled to receive the second output signal, a second terminal of the fourth tracking capacitor being coupled to receive the first output signal.

4. The differential amplifier of claim 3 wherein capacitances of the first, second, third and fourth tracking capacitors are equal and the first and second switches are of equal size.

5. The differential amplifier of claim 3 wherein the first and second switches are of equal size and capacitances of the first, second, third and fourth tracking capacitors have values which result in symmetric charge injection into the first and second outputs of the first folded-cascode stage.

6. The differential amplifier of claim 3 wherein the first and second input transistors are P-channel transistors the first electrodes of which are sources, the second electrodes of which are drains, and the control electrodes of which are gates, and the first and second current source transistors and the first and second cascode transistors are N-channel transistors the first electrodes of which are sources, the second electrodes of which are drains, and the control electrodes of which are gates.

7. The differential amplifier of claim 6 wherein the third and fourth current source transistors are P-channel transistors the first electrodes of which are sources, the second electrodes of which are drains, and the control electrodes of which are gates, the first folded-cascode stage including a P-channel third cascode transistor coupled between the drain of the third current source transistor and the first output and a P-channel fourth cascode transistor coupled between the drain of the fourth current source transistor and the second output.

8. The differential amplifier of claim 3 wherein the third, fourth and fifth input transistors are P-channel transistors.

9. The differential amplifier of claim 8 wherein the secondary amplifying stage includes a second folded cascode circuit which includes a N-channel fifth cascode transistor having a source coupled to a third summing junction in the second folded cascode circuit and a drain coupled to a drain and gate of a P-channel seventh current source transistor and a N-channel sixth cascode transistor having a source coupled to a fourth summing junction in the second folded cascode circuit and a drain coupled to a drain and gate of a P-channel eighth current source transistor and to the output conducting the common mode feedback control signal.

10. The differential amplifier of claim 3 wherein the first and second switches are closed in response a phase signal during an initial phase and then are opened during an amplifying phase of the differential amplifier.

11. The differential amplifier of claim 10 wherein the first and second switches are CMOS switches.

12. The differential amplifier of claim 10 including an auto-zeroing circuit coupled between the first and second outputs of the first folded cascode stage.

13. A method of reducing error in a differential amplifier including a differential input pair coupled to a folded cascode stage and a common mode feedback circuit including a tracking circuit coupled to first and second outputs of the folded cascode stage, the method comprising:

(a) coupling the first and second outputs to first terminals of first and second tracking capacitors, respectively, in a first section of the tracking circuit, the first and a second tracking capacitors having second terminals on which a first common mode output signal is produced, and coupling the second and first outputs of the folded-cascode stage to first terminals of third and fourth tracking capacitors, respectively, in a second section of the tracking circuit, the third and fourth tracking capacitors having second terminals on which a second common mode output signal is produced;

(b) discharging the first tracking capacitor and producing a direct coupling of the first output to a first input of an auxiliary common mode feedback amplifier, and discharging the third tracking capacitor and producing a direct coupling of the second output to a second input of the auxiliary common mode feedback amplifier, while applying a desired common mode output voltage to a third input of the auxiliary common mode feedback amplifier;

(c) terminating the direct couplings to cause the first and second common mode output voltages to be produced; and

(d) generating a common mode feedback control signal by means of the auxiliary common mode feedback amplifier and applying the common mode feedback control signal to bias the folded cascode stage.

14. The method of claim 13 wherein step (b) includes closing a first switch coupled across the first tracking capacitor to discharge the first tracking capacitor and produce the direct coupling of the first output and closing a second switch coupled across the third tracking capacitor to discharge the third tracking capacitor and produce the direct coupling of the second output.

15. The method of claim 14 wherein step (c) includes opening the first and second switches to terminate the direct couplings.

16. A differential amplifier comprising:

(a) a differential input pair coupled to a folded cascode stage and a common mode feedback circuit including a tracking circuit coupled to first and second outputs of the folded cascode stage;

(b) means for coupling the first and second outputs to first terminals of first and second tracking capacitors, respectively, in a first section of the tracking circuit, the first and a second tracking capacitors having second terminals on which a first common mode output signal is produced, and means for coupling the second and first outputs of the folded-cascode stage to first terminals of third and fourth tracking capacitors, respectively, in a second section of the tracking circuit, the third and fourth tracking capacitors having second terminals on which a second common mode output signal is produced;

(c) means for discharging the first tracking capacitor and producing a direct coupling of the first output to a first input of an auxiliary common mode feedback amplifier, and means for discharging the third tracking capacitor and producing a direct coupling of the second output to a second input of the auxiliary common mode feedback amplifier, while applying a desired common mode output voltage to a third input of the auxiliary common mode feedback amplifier;

(d) means for terminating the direct couplings to cause the first and second common mode output voltages to be produced; and

(e) means for generating a common mode feedback control signal by means of the auxiliary common mode feedback amplifier and applying the common mode feedback control signal to bias the folded cascode stage.