Semiconductor Device

• US 20080247208A1
• Filed: 03/19/2008
• Published: 10/09/2008
• Est. Priority Date: 04/04/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Fujita, Masashi, Kato, Kiyoshi
• Granted Patent: US 8,164,933 B2
• Time in Patent Office: Days
• US Class Current: 363/127
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Abstract

A semiconductor device is provided, which comprises a rectifier circuit configured to generate a first voltage from a first signal inputted from an input terminal, a comparing circuit configured to compare a reference voltage and the first voltage inputted from the rectifier circuit and to output a second signal to a switch, and a voltage generation circuit configured to generate a second voltage from the first signal inputted from the input terminal. The rectifier circuit includes a transistor including at least a control terminal, and the voltage generation circuit inputs the second voltage to the control terminal when the switch is turned on in accordance with the second signal.

Claims

1. A semiconductor device comprising:

a rectifier circuit configured to generate a first voltage from a first signal inputted from an input terminal,

a comparing circuit configured to compare a reference voltage and the first voltage inputted from the rectifier circuit and to output a second signal to a switch, and

a voltage generation circuit configured to generate a second voltage from the first signal inputted from the input terminal,

wherein;

the rectifier circuit includes a transistor including at least a control terminal, and

the voltage generation circuit inputs the second voltage to the control terminal when the switch is turned on in accordance with the second signal.

2. The semiconductor device according to claim 1, further comprising a bias circuit configured to generate the reference voltage and to output the reference voltage to the comparing circuit.

3. The semiconductor device according to claim 1, further comprising a bias circuit configured to generate a third voltage from the first signal inputted from the input terminal and to output a third signal to a second switch.

4. The semiconductor device according to claim 1, further comprising a bias circuit configured to generate a third voltage from the first signal inputted from the input terminal and to output a third signal to a second switch,

wherein the bias circuit inputs the third voltage to the control terminal when the second switch is turned on in accordance with the third signal inputted from the comparing circuit.

5. The semiconductor device according to claim 1, further comprising an antenna electrically connected to the input terminal.

6. The semiconductor device according to claim 1, wherein the switch is disposed between the input terminal and the voltage generation circuit.

7. The semiconductor device according to claim 1, wherein the rectifier circuit is a half-wave voltage doubler rectifier circuit.

8. A semiconductor device comprising:

a rectifier circuit configured to generate a first voltage from a first signal inputted from an input terminal,

a comparing circuit configured to compare a reference voltage and the first voltage inputted from the rectifier circuit and to output a second signal to a switch, and

a voltage generation circuit configured to generate a second voltage from the first signal inputted from the input terminal,

wherein;

the rectifier circuit includes a transistor including a semiconductor layer, and a gate terminal and a control terminal overlapping each other with the semiconductor layer interposed therebetween, and

the voltage generation circuit inputs the second voltage to the control terminal when the switch is turned on in accordance with the second signal.

9. The semiconductor device according to claim 8, further comprising a bias circuit configured to generate the reference voltage and to output the reference voltage to the comparing circuit.

10. The semiconductor device according to claim 8, further comprising a bias circuit configured to generate a third voltage from the first signal inputted from the input terminal and to output a third signal to a second switch.

11. The semiconductor device according to claim 8, further comprising a bias circuit configured to generate a third voltage from the first signal inputted from the input terminal and to output a third signal to a second switch,

wherein the bias circuit inputs the third voltage to the control terminal when the second switch is turned on in accordance with the third signal inputted from the comparing circuit.

12. The semiconductor device according to claim 8, further comprising an antenna electrically connected to the input terminal.

13. The semiconductor device according to claim 8, wherein the switch is disposed between the input terminal and the voltage generation circuit.

14. The semiconductor device according to claim 8, wherein the rectifier circuit is a half-wave voltage doubler rectifier circuit.

15. A semiconductor device comprising:

a rectifier circuit configured to generate a first voltage from a first signal inputted from an input terminal,

a comparing circuit configured to compare a reference voltage and the first voltage inputted from the rectifier circuit and to output a second signal to a switch, and

a voltage generation circuit configured to generate a second voltage from the first signal inputted from the input terminal,

wherein;

the rectifier circuit includes a transistor including a single crystal semiconductor layer, the single crystal semiconductor layer includes at least a source, a drain, and a control terminal,

the voltage generation circuit inputs the second voltage to the control terminal when the switch is turned on in accordance with the second signal.

16. The semiconductor device according to claim 15, further comprising a bias circuit configured to generate the reference voltage and to output the reference voltage to the comparing circuit.

17. The semiconductor device according to claim 15, further comprising a bias circuit configured to generate a third voltage from the first signal inputted from the input terminal and to output a third signal to a second switch.

18. The semiconductor device according to claim 15, further comprising a bias circuit configured to generate a third voltage from the first signal inputted from the input terminal and to output a third signal to a second switch,

wherein the bias circuit inputs the third voltage to the control terminal when the second switch is turned on in accordance with the third signal inputted from the comparing circuit.

19. The semiconductor device according to claim 15, further comprising an antenna electrically connected to the input terminal.

20. The semiconductor device according to claim 15, wherein the switch is interposed between the input terminal and the voltage generation circuit.

21. The semiconductor device according to claim 15, wherein the rectifier circuit is a half-wave voltage doubler rectifier circuit.