Contention detection with data consolidation

• US 20080250221A1
• Filed: 10/05/2007
• Published: 10/09/2008
• Est. Priority Date: 10/09/2006
• Status: Abandoned Application

• Current Assignee: John M. Holt
• Original Assignee: John M. Holt
• Inventors: Holt, John M.
• Application Number:
  US11/973,325
• Publication Number:
  US 20080250221A1
• Time in Patent Office: Days
• US Class Current: 711/200
• CPC Class Codes: G06F 12/0815 Cache consistency protocols
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with every change made to addressed memory locations. Contention can arise when the same memory location is substantially simultaneously updated by two or more machines because of transmission delays and latency of the communications network interconnecting all the computers. In particular a method of data consolidation which permits contention detection and resolution is disclosed. A count value indicative of the cumulative number of times each memory location has been updated is utilized. Contention is indicated if the currently stored count value and the incoming updating count value are the same. The volume of memory occupied can be consolidated by deleting the count value, or reducing it from 32 bits to 1 bit, from time to time, and re-initializing the count value as necessary. An individual count value for each updating signal (95, 195), and a group updating signal (295) having a single count value, are both disclosed.

Claims

1. A computer adapted for data consolidation to permit detection and/or resolution of contention where addressed memory in which memory locations each having a specific address or identifier can be updated substantially simultaneously from a plurality of sources, said computer comprising:

a data storage device adapted for storing (i) a specific address of each memory location to be updated, (ii) for each said specific address the content thereof which is overwritten by any received updated content, and (iii) an updating count indicative of the cumulative number of occasions on which each said memory location has been updated inclusive of any current updating; and

a data consolidation means connected to said data storage to from time to time on the occurrence of a predetermined condition consolidate the stored updating count.

2. The computer as in claim 1, wherein said data storage device stores (i) said specific address of each memory location to be updated, (ii) said content for each said specific address which is overwritten by any received updated content, and (iii) said updating count indicative of the cumulative number of occasions on which each said memory location has been updated inclusive of any current updating

3. The computer as in claim 1, wherein said data consolidation means includes a re-initializing means to re-set all said updating counts to a predetermined member.

4. The computer as in claim 3, wherein said predetermined number is zero.

5. The computer as in claim 1, wherein said consolidation means predetermined condition comprises the absence of any updating signal/packet for a predetermined period of time.

6. The computer as in claim 1, wherein said consolidation means predetermined condition comprises the available spare memory space within said data storage falling below a predetermined threshold.

7. The computer as in claim 1, wherein said consolidation means predetermined condition comprises the activity of a central processing unit associated with said memory location falling below a predetermined threshold.

8. The computer as in claim 1, wherein said consolidation means consolidates each said stored updating count by reducing the number of bits thereof.

9. The computer as in claim 8, wherein said reduced number of bits comprises one bit.

10. The computer as in claim 8, wherein said consolidation means on receipt of an updating signal/packet expands said reduced stored updating count.

11. The computer as in claim 1, wherein said consolidation means consolidates each said stored updating count by deletion thereof.

12. The computer as in claim 11, wherein said consolidation means on receipt of an updating signal/packet including an incoming updating count re-creates a stored updating count and sets same to equal said incoming updating count.

13. The computer as in claim 11, wherein said consolidation means on receipt of an updating signal/packet re-creates said stored updating count and sets same to one.

14. The computer as in claim 1, wherein the format of any updating signal/packet provides an updating count for each memory location to be updated.

15. The computer as in claim 1, wherein the format of any updating signal/packet includes data simultaneously updating a group of said memory locations and said updating signal/packet includes a single updating count for all said memory locations to be updated.

16. A method of data consolidation in a computer for detection and/or resolution of contention in addressed memory updating in which a memory location having a specific address or identifier can be updated substantially simultaneously from a plurality of sources different from said computer, said method comprising the steps of:

(i) utilizing an updating signal/packet format comprising the specific address of the memory location in said computer to be updated, the content with which said memory location in said computer is to be updated, and an updating count indicative of the cumulative number of occasions on which said memory location in said computer will have been updated inclusive of the current updating;

(ii) storing for each said memory location in said computer the updating count of the previously received updating; and

(iii) from time to time on the occurrence of a predetermined condition, consolidating the stored updating count.

17. The method as in claim 16, including the further step of:

(iv) re-initializing said computer by re-setting all said updating counts to a predetermined number.

18. The method as in claim 17, including the step of:

(v) setting said predetermined number as zero.

19. The method as in claim 16, wherein said predetermined condition comprises the absence of any updating signal/packet for a predetermined period of time.

20. The method as in claim 16, wherein said predetermined condition comprises available spare memory space falling below a predetermined threshold.

21. The method as in claim 16, wherein said predetermined condition comprises the activity of a central processing unit associated with said memory location falling below a predetermined threshold.

22. The method as in claim 16, including the further step of:

(vi) consolidating the stored updating count by reducing the number of bits thereof.

23. The method in claim 22, including the further step of:

(vii) reducing the number of bits of said stored updating count to one bit.

24. The method as in claim 23, including the further step of:

(viii) expanding said reduced stored updating count on receipt of the next updating signal/packet.

25. The method as in claim 24, including the further steps of:

(ix) consolidating said stored updating count by deleting same;

(x) re-creating an updating count on the next occasion of writing to memory and transmission of the new memory value to the other machines;

(xi) re-creating a stored updating count on receipt of the next updating signal/packet and setting the re-created count to equal the count of the received message;

(xii) setting the re-created updating count to one;

(xiii) for each said updating signal/packet format providing an updating count for each memory location to be updated; and

(xiv) for a plurality of memory locations to be updated substantially simultaneously forming a group updating signal comprising all said memory locations to be updated, the content or value of each said memory location to be updated, and a single updating count for all said memory locations to be updated.