SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

• US 20080251843A1
• Filed: 04/10/2008
• Published: 10/16/2008
• Est. Priority Date: 04/16/2007
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: NAKAJIMA, Hiroomi
• Granted Patent: US 7,902,584 B2
• Time in Patent Office: Days
• US Class Current: 257/347
• CPC Class Codes: H01L 29/7841 with floating body, e.g. programmable transistors
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H10B 12/00 Dynamic random access memory [DRAM] devices
• CPC Class Codes: H10B 12/056 the transistor being a FinFET
• CPC Class Codes: H10B 12/20 DRAM devices comprising floating-body transistors, e.g. floating-body cells
• CPC Class Codes: H10B 12/36 the transistor being a FinFET
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

This disclosure concerns a semiconductor memory device including a substrate; an insulating film provided above the substrate; a semiconductor layer provided above the insulating film and extending in a plane which is parallel to a surface of the substrate; a first gate dielectric film provided on an inner wall of a opening penetrating through the semiconductor layer; a first gate electrode penetrating through the opening and isolated from the semiconductor layer by the first gate dielectric film; a second gate dielectric film formed on a side surface and an upper surface of the semiconductor layer located on the first gate electrode; and a second gate electrode provided on the side surface and the upper surface of the semiconductor layer via the second gate dielectric film, isolated from the first gate electrode, and superimposed on the first gate electrode.

Claims

1. A semiconductor memory device comprising:

a substrate;

an insulating film provided above the substrate;

a semiconductor layer provided above the insulating film and extending in a plane which is parallel to a surface of the substrate;

a first gate dielectric film provided on an inner wall of a opening penetrating through the semiconductor layer;

a first gate electrode penetrating through the opening and isolated from the semiconductor layer by the first gate dielectric film;

a second gate dielectric film formed on a side surface and an upper surface of the semiconductor layer located on the first gate electrode; and

a second gate electrode provided on the side surface and the upper surface of the semiconductor layer via the second gate dielectric film, isolated from the first gate electrode, and superimposed on the first gate electrode.

2. The semiconductor memory device according to claim 1, wherein

a region of the semiconductor layer right under the second gate electrode is in an electrically floating state, and functions as a floating body into which or from which carriers are accumulated or emitted to store data, and

the semiconductor memory device further comprises a source layer and a drain layer provided in regions of the semiconductor layer adjacent to the floating body, respectively.

3. The semiconductor memory device according to claim 1, wherein the insulating film is formed into a bird'"'"'s beak shape below the semiconductor layer.

4. The semiconductor memory device according to claim 1, wherein an extension direction of the first gate electrode and the second gate electrode crosses an extension direction of the semiconductor layer.

5. The semiconductor memory device according to claim 1, wherein the second gate electrode is formed into an Ω

shape or a π

shape on the side surface and the upper surface of the semiconductor layer via the second gate dielectric film.

6. The semiconductor memory device according to claim 4, wherein

a contact to the first gate electrode is provided on one end of the first gate electrode, and

a contact to the second gate electrode is provided on other end opposite to the one end of the first gate electrode across the semiconductor layer.

7. The semiconductor memory device according to claim 2, further comprising:

a source line connected to the source layer; and

a bit line connected to the drain layer, wherein

the first gate electrode, the second gate electrode, and the source line extend in parallel to one another, and the bit line is approximately orthogonal to the first gate electrode, the second gate electrode, and the source line.

8. A method of manufacturing a semiconductor memory device, comprising:

forming a first material layer in a gate electrode formation region on a bulk silicon substrate, the first material layer extending a direction;

forming a semiconductor layer on the bulk silicon substrate and the first material layer to cross an extension direction of the first material layer;

forming a trench penetrating through the first material layer and reaching the bulk silicon substrate by etching the first material layer and the bulk silicon substrate uncovered with the semiconductor layer;

forming a sidewall film on a side surface of the trench;

forming a buried oxide film below the semiconductor layer and the first material layer by oxidizing the bulk silicon substrate located on a bottom of the trench;

forming a opening penetrating through the semiconductor layer by removing the first material layer;

forming a first gate dielectric film on an inner wall of the opening;

forming a first gate electrode in the opening;

forming a second gate dielectric film on a side surface and an upper surface of the semiconductor layer located on the first gate electrode; and

forming a second gate electrode on the second gate dielectric film.

9. The method of manufacturing a semiconductor memory device according to claim 8, wherein

the buried oxide film is formed into a bird'"'"'s beak shape below the semiconductor layer.

10. The method of manufacturing a semiconductor memory device according to claim 8, wherein

the first material layer is made of silicon germanium.

11. The method of manufacturing a semiconductor memory device according to claim 8, wherein

the forming of the semiconductor layer includes:

depositing a silicon oxide film on the first material layer;

forming a stripe mask material on the silicon oxide film, the stripe mask material extending in an orthogonal direction to an extension direction of the first material layer;

removing the silicon oxide film using the stripe mask material as a mask until the bulk silicon substrate and the e first material layer are exposed;

growing a monocrystalline silicon layer on the exposed bulk silicon substrate and the exposed first material layer; and

removing the mask material and the silicon oxide film.

12. A method of manufacturing a semiconductor memory device, comprising:

forming a first material layer in a gate electrode formation region on a bulk silicon substrate, the first material layer extending a direction;

growing a monocrystalline silicon layer on the silicon substrate and the first material layer;

forming a stripe mask material on the monocrystalline silicon layer, the stripe mask material extending in an orthogonal direction to the extension direction of the first material layer;

forming a trench penetrating through the first material layer and reaching the bulk silicon substrate by removing the monocrystalline silicon layer, the first material layer, and upper portions of the silicon substrate using the mask material as a mask;

forming a side wall on a inner side surface of the trench;

forming a buried oxide film below the monocrystalline silicon layer and the first material layer by oxidizing the bulk silicon substrate located on a bottom of the trench;

forming a opening penetrating through the monocrystalline silicon layer by removing the first material layer;

forming a first gate dielectric film on an inner wall of the opening;

forming a first gate electrode in the opening;

forming a second gate dielectric film on a side surface and an upper surface of the monocrystalline silicon layer located on the first gate electrode; and

forming a second gate electrode on the second gate dielectric film.

13. The method of manufacturing a semiconductor memory device according to claim 12, wherein

the buried oxide film is formed into a bird'"'"'s beak shape below the monocrystalline silicon layer.

14. The method of manufacturing a semiconductor memory device according to claim 12, wherein

the first material layer is made of silicon germanium.