Semiconductor Device Comprising a Semiconductor Chip Stack and Method for Producing the Same

• US 20080258277A1
• Filed: 10/02/2007
• Published: 10/23/2008
• Est. Priority Date: 04/19/2007
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Mahler, Joachim, Hosseini, Khalil
• Granted Patent: US 7,880,285 B2
• Time in Patent Office: Days
• US Class Current: 257/676
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/2612 Auxiliary members for layer connectors, e.g. spacers
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/293 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/4813 Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/4903 Connectors having different sizes, e.g. different diameters
• CPC Class Codes: H01L 2224/49051 Connectors having different shapes
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/4911 the connectors being bonded to at least one common bonding area, e.g. daisy chain
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/78 : Apparatus for connecting with wire connectors
• CPC Class Codes: H01L 2224/83801 : Soldering or alloying
• CPC Class Codes: H01L 2224/8381 : involving forming an intermetallic compound at the bonding interface
• CPC Class Codes: H01L 2224/83825 : Solid-liquid interdiffusion
• CPC Class Codes: H01L 2224/83851 : being an anisotropic conductive adhesive
• CPC Class Codes: H01L 2224/85 : using a wire connector
• CPC Class Codes: H01L 2224/92 : Specific sequence of method steps
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 2225/06506 : Wire or wire-like electrical connections between devices
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06572 : Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 23/3107 : the device being completely enclosed
• CPC Class Codes: H01L 23/49531 : the additional leads being a wiring board
• CPC Class Codes: H01L 23/49548 : Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49575 : Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/33 : of a plurality of layer connectors
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/074 : Stacked arrangements of non-apertured devices
• CPC Class Codes: H01L 25/162 : the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/0781 : being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19107 : off-chip wires

Abstract

A semiconductor device includes a semiconductor chip stack having at least one lower semiconductor chip as a base of the semiconductor chip stack, and at least one upper semiconductor chip. An insulating intermediate plate is arranged between the semiconductor chips. Connecting elements wire the semiconductor chips, the intermediate plate and external terminals to one another.

Claims

1. A semiconductor device comprising:

a semiconductor chip stack including at least one lower semiconductor chip as base of the semiconductor chip stack, and at least one upper semiconductor chip;

an insulating intermediate plate arranged between the semiconductor chips, and

connecting elements which electrically connect the semiconductor chips, the intermediate plate and external terminals to one another;

wherein the semiconductor device has surface-mountable external contacts on its underside.

2. The semiconductor device as claimed in claim 1, wherein the intermediate plate has a conductive patterned coating on at least one side thereof.

3. The semiconductor device as claimed in claim 1, wherein the intermediate plate (4) is a ceramic plate.

4. The semiconductor device as claimed in claim 1, wherein the intermediate plate is a plastic plate.

5. The semiconductor device as claimed in claim 4, wherein the plastic plate comprises a substance from a group consisting of polyimides, high-temperature thermoplastics, polybenzocyclobutene or polybenzoxazoles or mixtures thereof.

6. The semiconductor device as claimed in claim 1, wherein the intermediate plate has a plating on at least one side thereof.

7. The semiconductor device as claimed in claim 6, wherein the plating is patterned.

8. The semiconductor device as claimed in claim 6, wherein the plating comprises a substance from a group consisting of copper, silver, nickel, palladium, nickel/palladium/gold or alloys thereof.

9. The semiconductor device as claimed in claim 1, wherein the intermediate plate has a higher thermal conductivity than silicon crystal of the semiconductor chips.

10. The semiconductor device as claimed in claim 1, wherein the intermediate plate has an areal extent greater than that of the at least one lower semiconductor chip.

11. The semiconductor device as claimed in claim 1, wherein a plurality of semiconductor chips are arranged alongside one another on the intermediate plate.

12. The semiconductor device as claimed in claim 1, wherein the intermediate plate has a patterned metal coating on a top side thereof.

13. The semiconductor device as claimed in claim 12, wherein the patterned metal coating has contact pads for connecting elements and contact pads for the at least one upper semiconductor chip.

14. The semiconductor device as claimed in claim 1, wherein the at least one lower semiconductor chip has a solderable coating on a top side thereof.

15. The semiconductor device as claimed in claim 14, wherein the solderable coating comprises a metal layer.

16. The semiconductor device as claimed in claim 1, wherein the at least one lower semiconductor chip has a coating composed of gold, silver, palladium or palladium/gold or alloys thereof on a top side thereof.

17. The semiconductor device as claimed in claim 1, wherein the intermediate plate and the semiconductor chips are fixed on one another by means of cohesive connections.

18. The semiconductor device as claimed in claim 17, wherein at least one of the cohesive connections comprises a solder layer.

19. The semiconductor device as claimed in claim 17, wherein at least one of the cohesive connections comprises a diffusion solder layer.

20. The semiconductor device as claimed in claim 17, wherein at least one of the cohesive connections comprises an insulating adhesive layer.

21. The semiconductor device as claimed in claim 17, wherein at least one of the cohesive connections comprises an electrically conductive adhesive layer.

22. The semiconductor device as claimed in claim 17, wherein a cohesive connection between the intermediate plate and one of the semiconductor chips and a cohesive connection between the intermediate plate and another one of the semiconductor chips have different properties.

23. The semiconductor device as claimed in claim 1, wherein the surface-mountable external contacts on the underside of the semiconductor device are embedded in a plastic housing composition apart from external contact areas.

24. The semiconductor device as claimed in claim 23, wherein the surface-mountable external contacts have leads of a leadframe with a chip island for the at least one lower semiconductor chip.

25. A method for producing a semiconductor device, comprising:

stacking a lower semiconductor chip, an intermediate plate and at least one further semiconductor chip one above another on a chip island of a semiconductor device carrier to provide a semiconductor chip stack;

fitting connecting elements from the semiconductor chips to the intermediate plate, between the semiconductor chips among one another, and to external terminals of the semiconductor device on the semiconductor device carrier; and

embedding the semiconductor chip stack and the connecting elements in a plastic housing composition.

26. The method as claimed in claim 25, further comprising providing the intermediate plate with a patterned plating at least on one side thereof by electroless chemical or by electrolytic metal deposition on a metallic seed layer.

27. The method as claimed in claim 26, wherein a sputtering method is used for depositing an electrically conductive seed layer.

28. The method as claimed in claim 26, wherein a photolithography technique in which a photoresist mask is formed is used for patterning the plating.

29. The method as claimed in claim 28, wherein a plasma ashing is used for removing the photoresist mask.

30. The method as claimed in claim 28, wherein a solvent is used for removing the photoresist mask.

31. The method as claimed in claim 28, wherein a dry etching method is used for removing the seed layer.

32. The method as claimed in claim 25, wherein a wiring structure is applied to the intermediate plate.

33. The method as claimed in claim 25, wherein a sintered ceramic method is used for producing the intermediate plate.

34. The method as claimed in claim 25, wherein a sintered ceramic block is separated for producing intermediate plates.

35. The method as claimed in claim 25, wherein a coating composed of gold, silver or palladium/gold or alloys thereof is deposited on a top side of the lower semiconductor chip.

36. The method as claimed in claim 25, wherein the intermediate plate and the semiconductor chips are stacked one on top of another by means of cohesive connections.

37. The method as claimed in claim 36, wherein at least one solder layer is applied as a cohesive connection.

38. The method as claimed in claim 36, wherein at least one diffusion solder layer is applied as a cohesive connection.

39. The method as claimed in claim 36, wherein at least one insulating adhesive layer is applied as a cohesive connection.

40. The method as claimed in claim 36, wherein at least one electrically conductive adhesive layer is applied as a cohesive connection.

41. A method for producing a plurality of semiconductor devices, comprising:

applying lower semiconductor chips on chip islands of a semiconductor device carrier in semiconductor device positions;

cohesively fixing intermediate plates on the lower semiconductor chips;

cohesively fixing at least one further semiconductor chip on the intermediate plates to form semiconductor chip stacks;

fitting connecting elements;

embedding the semiconductor chip stacks and the connecting elements in a plastic housing composition; and

separating the semiconductor device carrier into individual semiconductor devices.