DC-DC converter with improved dynamic response

• US 20080258701A1
• Filed: 04/17/2008
• Published: 10/23/2008
• Est. Priority Date: 04/17/2007
• Status: Active Grant

• Current Assignee: GaNPower Semiconductor (Foshan) Ltd
• Original Assignee: Queen's University At Kingston
• Inventors: Liu, Yan-Fei, Meyer, Eric
• Granted Patent: US 8,054,058 B2
• Time in Patent Office: Days
• US Class Current: 323/328
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention relates to a control method and a controller for a DC-DC converter, such as a synchronous Buck converter, which exploits the principle of capacitor charge balance to allow the converter to recover from a positive and/or negative load current step in the shortest achievable time, with the lowest possible voltage undershoot/overshoot. The control method may be implemented by either an analog or a digital circuit. The controller may be integrated with existing controller schemes (such as voltage-mode controllers) to provide superior dynamic performance during large-signal transient conditions while providing stable operation during steady state conditions. The invention also relates to a method and a modification of a DC-DC converter topology that comprises connecting a controlled current source between an input terminal and an output terminal of the DC-DC converter; detecting a load current step to a new load current; modifying a duty cycle of the DC-DC converter; and modifying current through a parallel output capacitor of the DC-DC converter by controlling current of the current source. The methods and circuits provided herein are applicable to Buck converters and Buck-derived converters such as forward, push-pull, half-bridge, and full-bridge converters.

Claims

1. A method for minimizing the output voltage deviation of a DC-DC converter in response to a load current step;

comprising;

(A) (i) detecting a positive load current step to a new load current, the positive load current step removing at least a portion of the stored charge from a parallel output capacitor of the DC-DC converter;

(ii) increasing a duty cycle of the DC-DC converter to increase current through a series output inductor, such current being greater than the new load current; and

(iii) decreasing the duty cycle of the DC-DC converter to simultaneously cause (a) the inductor current to decrease to be equal the new load current and (b) the at least a portion of the stored charge removed from the parallel output capacitor during the positive load current step to be replaced; and

/or

(B) (i) detecting a negative load current step to a new load current, the negative load current step adding charge to the stored charge of a parallel output capacitor of the DC-DC converter;

(ii) decreasing a duty cycle of the DC-DC converter to decrease current through a series output inductor, such current being less than the new load current; and

(iii) increasing the duty cycle of the DC-DC converter to simultaneously cause (a) the inductor current to increase to be equal the new load current and (b) the charge added to the parallel output capacitor during the negative load current step to be removed.

2. The method of claim 1, wherein increasing the duty cycle of the DC-DC converter comprises increasing the duty cycle to a maximum value, and/or decreasing the duty cycle of the DC-DC converter comprises decreasing the duty cycle to a minimum value.

3. The method of claim 1, wherein detecting the positive load current step and/or the negative load current step comprises sensing the output capacitor current.

4. The method of claim 1, wherein detecting further comprises (i) estimating the output capacitor current by determining the output capacitor current slope using a set of capacitor current estimations or (ii) sensing the output capacitor current using a trans-impedance amplifier.

5. The method of claim 1, wherein the DC-DC converter is selected from a Buck, forward, push-pull, half-bridge, and full-bridge converter.

6. The method of claim 1, wherein the DC-DC converter is a Buck converter.

7. A controller for minimizing the output voltage deviation of a DC-DC converter in response to a load current step;

comprising;

(A) a detector for detecting a positive load current step to a new load current, the positive load current step removing at least a portion of the stored charge from a parallel output capacitor of the DC-DC converter;

means for increasing a duty cycle of the DC-DC converter to increase current through a series output inductor, such current being greater than the new load current; and

means for decreasing the duty cycle of the DC-DC converter to simultaneously cause (a) the inductor current to decrease to be equal the new load current and (b) the at least a portion of the stored charge removed from the parallel output capacitor during the positive load current step to be replaced; and

/or

(B) a detector for detecting a negative load current step to a new load current, the negative load current step adding charge to the stored charge of a parallel output capacitor of the DC-DC converter;

means for decreasing a duty cycle of the DC-DC converter to decrease current through a series output inductor, such current being less than the new load current; and

means for increasing the duty cycle of the DC-DC converter to simultaneously cause (a) the inductor current to increase to be equal the new load current and (b) the charge added to the parallel output capacitor during the negative load current step to be removed.

8. The controller of claim 7, wherein the means for increasing the duty cycle of the DC-DC converter increases the duty cycle to a maximum value, and/or the means for decreasing the duty cycle decreases the duty cycle to a minimum value.

9. The controller of claim 7, wherein the means for increasing the duty cycle and the means for decreasing the duty cycle comprise a double integrator.

10. The controller of claim 8, wherein the means for detecting comprises a trans-impedance amplifier that senses the output capacitor current or a means for estimating the output capacitor current by determining the output capacitor current slope using a set of capacitor current estimations.

11. The controller of claim 7, wherein the DC-DC converter is selected from a Buck, forward, push-pull, half-bridge, and full-bridge converter.

12. The controller of claim 7, wherein the DC-DC converter is a Buck converter.

13. A method for minimizing the output voltage deviation of a DC-DC converter in response to a load current step;

comprising;

connecting a controlled current source between an input terminal of the DC-DC converter and an output terminal of the DC-DC converter;

detecting a load current step to a new load current;

modifying a duty cycle of the DC-DC converter; and

modifying current through a parallel output capacitor of the DC-DC converter by controlling current of the current source;

wherein output current of the DC-DC converter reaches the new load current with minimal deviation of the output voltage.

14. The method of claim 13, wherein connecting a controlled current source comprises connecting in series an inductor and a switch in parallel with the parallel output capacitor, and connecting a rectifier with its anode connected to a point between the inductor and the switch and its cathode connected to an input voltage of the DC-DC converter.

15. The method of claim 13, wherein connecting a controlled current source comprises connecting in series an inductor and a rectifier in parallel with the parallel output capacitor, the rectifier having its anode connected to circuit ground and its cathode connected to the inductor, and connecting a switch between (i) a point between the inductor and the rectifier and (ii) an input voltage of the DC-DC converter.

16. The method of claim 13, wherein connecting a controlled current source comprises connecting in series an inductor and a first switch in parallel with the parallel output capacitor, and connecting a second switch between (i) a point between the inductor and the first switch and (ii) an input voltage of the DC-DC converter.

17. The method of claim 13, further comprising operating the controlled current source according to a function selected from current-mode hysteretic, peak current mode, average current mode, and constant duty cycle.

18. The method of claim 13, further comprising operating the controlled current source using a charge balance auxiliary branch controller, a simplified auxiliary branch controller, a variable current auxiliary branch controller, or a voltage detector auxiliary branch controller.

19. The method of claim 13, wherein detecting further comprises (i) estimating the output capacitor current by determining the output capacitor current slope using a set of capacitor current estimations;

(ii) sensing the output capacitor current using a trans-impedance amplifier;

or (iii) sampling the output voltage at an auxiliary switching frequency.

20. The method of claim 13, wherein the DC-DC converter is selected from a Buck, forward, push-pull, half-bridge, and full-bridge converter.

21. The method of claim 13, wherein the DC-DC converter is a Buck converter.

22. A DC-DC converter comprising:

a controlled current source connected between an input terminal of the DC-DC converter and an output terminal of the DC-DC converter; and

a controller that controls the current source by (a) detecting (i) a load current step to a new load current, or (ii) an output voltage change;

(b) modifying a duty cycle of the DC-DC converter in response to the detected load current step or output voltage change; and

(c) modifying current through a parallel output capacitor of the DC-DC converter by controlling current of the current source;

wherein output current of the DC-DC converter reaches the new load current with minimal deviation in output voltage.

23. The DC-DC converter of claim 22, wherein the controller operates the current source according to a function selected from current-mode hysteretic, peak current mode, average current mode, and constant duty cycle.

24. The DC-DC converter of claim 22, wherein the controller comprises a charge balance auxiliary branch controller, a simplified auxiliary branch controller, a variable current auxiliary branch controller, or a voltage detector auxiliary branch controller.

25. The DC-DC converter of claim 22, wherein the DC-DC converter is selected from a Buck, forward, push-pull, half-bridge, and full-bridge converter.

26. The DC-DC converter of claim 22, wherein the DC-DC converter is a Buck converter.