Asynchronous display driving scheme and display

• US 20080259019A1
• Filed: 03/19/2008
• Published: 10/23/2008
• Est. Priority Date: 06/16/2005
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Ng, Sunny Yat-san
• Granted Patent: US 8,339,428 B2
• Time in Patent Office: Days
• US Class Current: 345/98
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2025 the sub-frames having all the same time duration
• CPC Class Codes: G09G 3/2029 the sub-frames having non-binary weights
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

A novel method for driving a display includes the steps of defining a modulation period during which a particular intensity value is asserted on a pixel of the display, dividing the modulation period into a plurality of coequal time intervals, receiving a data word, which includes a plurality of equally-weighted bits and is indicative of an intensity value to be displayed by the pixel, updating a signal asserted on the pixel during each of a plurality of consecutive time intervals during a first portion of the modulation period, and updating the signal asserted on the pixel every m^th time interval during a second portion of the modulation period, where m is equal to the weight of each of the equally-weighted bits. The data word can either be composed of two groups of equally-weighed bits, or a combination of binary bits and equally-weighted. The invention also includes a novel display driver for executing the driving methods.

Claims

1. A method for driving a display device, said method comprising:

defining a modulation period during which a particular intensity value is to be asserted on a pixel of said display device;

dividing said modulation period into a plurality of coequal time intervals;

receiving a data word indicative of an intensity value to be displayed by said pixel, said data word including a plurality of equally-weighted bits;

updating a signal asserted on said pixel during each of a plurality of consecutive ones of said time intervals during a first portion of said modulation period; and

updating the signal asserted on said pixel every m^th one of said time intervals during a second portion of said modulation period; and

wherein

m is an integer equal to the weight of each of said plurality of equally-weighted bits.

2. A method according to claim 1, wherein:

said data word includes a first group of equally-weighted bits each having a first weight, said first group of bits including at least one bit;

said data word includes a second group of equally-weighted bits each having a second weight, said second group of bits including a plurality of bits; and

m is equal to said second weight.

3. A method according to claim 2, wherein:

said pixel includes a pixel electrode;

said step of updating said signal asserted on said pixel during said first portion of said modulation period includes asserting each of said equally-weighted bits of said first group on said pixel electrode; and

only one of said equally-weighted bits of said first group is asserted per said consecutive time interval.

4. A method according to claim 3, wherein:

each bit of said first group of bits has a value indicative of one of an on-state and an off-state; and

said step of asserting each of said equally-weighted bits of said first group of bits includes asserting said equally-weighted bits having said off-state value on said pixel electrode prior to asserting said equally-weighted bits of said first group having said on-state value.

5. A method according to claim 3, wherein said step of updating said signal asserted on said pixel during said first portion of said modulation period includes asserting one equally-weighted bit from said second group on said pixel electrode during the last one of said consecutive time intervals.

6. A method according to claim 5, wherein:

each bit of said second group of bits has a value indicative of one of an on-state and an off-state;

at least one equally-weighted bit of said second group has said on-state value; and

said step of asserting said equally-weighted bit of said second group during said last consecutive time interval includes asserting said equally-weighted bit having said on-state value on said pixel electrode.

7. A method according to claim 3, wherein said step of updating said signal asserted on said pixel during said second portion of said modulation period includes asserting one equally-weighted bit of said second group on said pixel electrode every m^th one of said time intervals.

8. A method according to claim 7, wherein:

each bit of said second group of bits has a value indicative of one of an on-state and an off-state; and

said step of asserting said second group of equally-weighted bits on said pixel electrode includes asserting said equally-weighted bits having said on-state value prior to asserting said equally-weighted bits having said off-state value.

9. A method according to claim 7, wherein:

said step of updating said signal during said first portion of said modulation period includes initializing said signal on said pixel during any one of said consecutive time intervals; and

said step of updating said signal during said second portion of said modulation period includes terminating said signal on said pixel during an m^th one of said time intervals depending on the value of one of said equally-weighted bits of said second group such that the duration from the time interval when said signal is initialized to the time interval when said signal is terminated corresponds to said intensity value.

10. A method according to claim 9, wherein said step of updating said signal during said first portion of said modulation period includes terminating said electrical signal on said pixel during the last one of said consecutive time intervals depending on the value of at least one equally-weighted bit of said second group.

11. A method according to claim 2, wherein:

said first weight equals one; and

m is an even integer.

12. A method according to claim 1, further comprising receiving a data word having at least one binary-weighted bit and a plurality of equally-weighted bits.

13. A method according to claim 12, wherein said data word further includes a plurality of consecutive, binary-weighted bits.

14. A method according to claim 13, wherein:

said data word includes a least significant binary-weighted bit; and

the number of said time intervals in said first portion of said modulation period is equal to 2^x, where x is equal to the number of consecutive, binary-weighted bits of said data word.

15. A method according to claim 14, wherein said step of updating said signal during said first portion of said modulation period includes determining whether to initialize said signal on said pixel during any but the last of said consecutive time intervals depending on the value of at least one of said plurality of consecutive, binary-weighted bits.

16. A method according to claim 14, wherein said step of updating said signal during said first portion of said modulation period includes determining whether to initialize said signal on said pixel during the last of said consecutive time intervals independent of the values of said consecutive, binary-weighted bits.

17. A method according to claim 12, wherein:

said pixel includes a pixel electrode; and

said step of updating said signal asserted on said pixel during said second portion of said modulation period includes asserting one of said plurality of equally-weighted bits on said pixel electrode every m^th one of said time intervals.

18. A method according to claim 17, wherein said step of updating said signal asserted on said pixel during said first portion of said modulation period includes asserting one of said plurality of equally-weighted bits on said pixel electrode during the last one of said consecutive time intervals.

19. A method according to claim 18, wherein:

each of said equally-weighted bits has a value indicative of one of an on-state and an off-state; and

said step of asserting one of said plurality of equally-weighted bits on said pixel electrode includes asserting said equally-weighted bits having said on-state value prior to asserting said equally-weighted bits having said off-state value.

20. A method according to claim 17, wherein said step of updating said signal during said second portion of said modulation period includes determining whether to terminate said signal on said pixel every m^th one of said time intervals depending on the value of at least one of said equally-weighted bits.

21. A method according to claim 12, wherein the number of said consecutive time intervals is equal to the sum of the weighted values of said binary-weighted bits plus one.

22. A method according to claim 1, wherein the number of said consecutive time intervals in said first portion of said modulation period is equal to m.

23. A method according to claim 1, wherein said step of receiving said data word includes:

receiving an n-bit binary-weighted data word indicative of an intensity value to be displayed by said pixel; and

converting at least one bit of said n-bit binary-weighted data word into a plurality of equally-weighted bits.

24. A method according to claim 23, further comprising:

selecting at least one binary-weighted bit; and

converting the remaining binary-weighted bits into said plurality of equally-weighted bits.

25. A method according to claim 24, further comprising:

selecting a plurality of consecutive, binary-weighted bits including said least significant bit; and

converting said remaining binary-weighted bits into a plurality of equally-weighted bits each having a weight equal to 2^x, where x represents the number of selected consecutive, binary-weighted bits.

26. A method according to claim 24, further comprising converting said at least one selected, binary-weighted bit into a second plurality of equally-weighted bits, the number of said second plurality of equally-weighted bits equal to the combined weight of said at least one selected, binary-weighted bit.

27. A method according to claim 1, wherein:

said step of updating said signal during said first portion of said modulation period includes switching said signal from an off-state to an on-state no more than once; and

said step of updating said signal during said second portion of said modulation period includes switching said signal from an on-state to an off-state no more than once.

28. A method according to claim 27, wherein said step of updating said signal during said first portion of said modulation period further includes switching said signal from said on-state to said off-state no more than twice.

29. A method according to claim 1, further comprising:

asserting said signal on said pixel in a first bias direction for a first group of said coequal time intervals; and

asserting said signal on said pixel in a second bias direction for a second group of said coequal time intervals.

30. An electronically-readable medium having code embodied therein for causing an electronic device to perform the method of claim 1.

31. A display driver comprising:

a timer operative to generate a series of time values each associated with a respective one of a plurality of coequal time intervals of a modulation period;

a data input terminal for receiving a data word including a plurality of equally-weighted bits;

an output terminal selectively coupled to a pixel in a row of said display; and

control logic, responsive to said time values and said data word, and operative to

update a signal asserted on said pixel during each of a plurality of consecutive ones of said time intervals during a first portion of said modulation period; and

update said signal asserted on said pixel every m^th one of said time intervals during a second portion of said modulation period; and

wherein

m is an integer equal to the weight of each of said plurality of equally-weighted bits.

32. A display driver according to claim 31, wherein:

said data word includes a first group of equally-weighted bits each having a first weight, said first group of bits including at least one bit;

said data word includes a second group of equally-weighted bits each having a second weight, said second group of bits including a plurality of bits; and

m is equal to said second weight.

33. A display driver according to claim 32, wherein:

said pixel includes a pixel electrode;

said control logic is operative to update said signal during said first portion of said modulation period by asserting each of said equally-weighted bits of said first group on said pixel electrode; and

said control logic is operative to assert only one of said equally-weighted bits of said first group per said consecutive time interval.

34. A display driver according to claim 33, wherein:

each bit of said first group of bits has a value indicative of one of an on-state and an off-state; and

said control logic is further operative to assert each equally-weighted bit of said first group having said off-state value on said pixel electrode prior to asserting said equally-weighted bits of said first group having said on-state value.

35. A display driver according to claim 33, wherein said control logic is further operative to assert one equally-weighted bit from said second group on said pixel electrode during the last one of said consecutive time intervals.

36. A display driver according to claim 35, wherein:

each bit of said second group of bits has a value indicative of one of an on-state and an off-state;

at least one equally-weighted bit of said second group has said on-state value; and

said control logic is further operative to assert said equally-weighted bit having said on-state value on said pixel electrode during said last consecutive time interval.

37. A display driver according to claim 33, wherein said control logic is further operative to update said signal asserted on said pixel during said second portion of said modulation period by asserting one equally-weighted bit of said second group on said pixel electrode every m^th one of said time intervals.

38. A display driver according to claim 37, wherein:

each bit of said second group of bits has a value indicative of one of an on-state and an off-state; and

said control logic is further operative to assert said bits of said second group of bits having said on-state value on said pixel electrode before asserting said bits having said off-state value.

39. A display driver according to claim 37, wherein said control logic is further operative to:

update said signal asserted on said pixel during said first portion of said modulation period by initializing said signal on said pixel during one of said consecutive time intervals; and

update said signal asserted on said pixel during said second portion of said modulation period by terminating said signal on said pixel during an m^th one of said time intervals depending on the value of one of said equally-weighted bits of said second group such that the duration from the time interval that said signal is initialized to the time interval that said signal is terminated corresponds to said intensity value.

40. A display driver according to claim 39, wherein said control logic is further operative to terminate said signal on said pixel during the last one of said consecutive time intervals depending on the values of said second group of equally-weighted bits.

41. A display driver according to claim 32, wherein:

said first weight equals one; and

m is an even integer.

42. A display driver according to claim 31, wherein said data word further includes at least one binary-weighted bit and a plurality of equally-weighted bits.

43. A display driver according to claim 42, wherein said data word further includes a plurality of consecutive, binary-weighted bits.

44. A display driver according to claim 43, wherein:

said data word includes a least-significant, binary-weighted bit; and

said control logic is further operative to define the number of said consecutive time intervals equal to 2^x, where x equals the number of said consecutive, binary-weighted bits.

45. A display driver according to claim 44, wherein said control logic is further operative to update said signal during said first portion of said modulation period by determining whether to initialize said signal on said pixel during all but the last of said consecutive time intervals depending on the value of at least one of said plurality of consecutive, binary-weighted bits.

46. A display driver according to claim 44, wherein said control logic is further operative to update said signal during said first portion of said modulation period by determining whether to initialize said signal on said pixel during the last of said consecutive time intervals independent of the values of said plurality of consecutive, binary-weighted bits.

47. A display driver according to claim 42, wherein:

said pixel includes a pixel electrode; and

said control logic is further operative to update said signal asserted on said pixel during said second portion of said modulation period by asserting one bit of said second group of bits on said pixel electrode every m^th one of said time intervals.

48. A display driver according to claim 47, wherein said control logic is further operative to update said signal asserted on said pixel during said first portion of said modulation period by asserting one of said plurality of equally-weighted bits on said pixel electrode during the last one of said consecutive time intervals.

49. A display driver according to claim 48, wherein:

each of said equally-weighted bits has a value indicative of one of an on-state and an off-state; and

said control logic is further operative to assert said equally-weighted bits having said on-state value on said pixel electrode prior to asserting said equally-weighted bits having said off-state value.

50. A display driver according to claim 47, wherein said control logic is further operative to update said signal during said second portion of said modulation period by determining whether to terminate said signal on said pixel every m^th one of said time intervals based upon the value of at least one of said equally-weighted bits.

51. A display driver according to claim 42, wherein said control logic is further operative to define the number of said consecutive time intervals equal to the sum of the weighted values of said at least one binary-weighted bit of said data word plus one.

52. A display driver according to claim 31, wherein said control logic is further operative to define the number of said consecutive time intervals equal to m.

53. A display driver according to claim 31, further comprising a data manager operative to:

receive an n-bit binary-weighted data word indicative of an intensity value to be displayed by said pixel; and

convert at least one bit of said n-bit binary-weighted data word into a plurality of equally-weighted bits.

54. A display driver according to claim 53, wherein said data manager is further operative to:

select at least one bit of said n-bit binary-weighted data word; and

convert the unselected binary-weighted bits of said n-bit binary-weighted data word into said plurality of equally-weighted bits.

55. A display driver according to claim 54, wherein said data manager is further operative to:

select a plurality of consecutive, binary-weighted bits including said least significant bit of said n-bit binary-weighted data word; and

convert the unselected binary-weighted bits into said plurality of equally-weighted bits such that each equally-weighed bit has a weight equal to 2^x, where x represents the number of selected consecutive binary-weighted bits.

56. A display driver according to claim 54, wherein said data manager is further operative to convert said at least one selected binary-weighted bits into a second plurality of equally-weighted bits, the number of said second plurality of equally-weighted bits equal to the combined weight of said at least one selected binary-weighted bit.

57. A display driver according to claim 31, wherein said control logic is operative to:

switch said signal asserted on said pixel from an off-state to an on-state no more than once during said first portion of said modulation period; and

switch said signal asserted on said pixel from an on-state to an off-state no more than once during said second portion of said modulation period.

58. A display driver according to claim 57, wherein said control logic is further operative to switch said signal from said on-state to said off-state no more than twice during said first portion of said modulation period.

59. A display driver according to claim 31, wherein said control logic is further operative to:

assert said signal on said pixel in a first bias direction with respect to a common electrode of said display during a first group of said coequal time intervals; and

assert said signal on said pixel in a second bias direction with respect to said common electrode for a second group of said coequal time intervals.

60. A display driver comprising:

a timer operative to generate a series of time values each associated with a respective one of a plurality of coequal time intervals of a modulation period;

a data input terminal for receiving a data word including a plurality of equally-weighted bits;

an output terminal selectively coupled to a pixel in a row of said display; and

means for updating a voltage asserted on said pixel during each of a plurality of consecutive ones of said time intervals during a first portion of said modulation period and updating said voltage asserted on said pixel every m^th one of said time intervals during a second portion of said modulation period, m being an integer equal to the weight of each of said equally-weighted bits.