Impedance Detector

• US 20080266021A1
• Filed: 09/29/2005
• Published: 10/30/2008
• Est. Priority Date: 10/06/2004
• Status: Active Grant

• Current Assignee: Qualcomm Technologies Incorporated (Qualcomm, Inc.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Van Bezooijen, Adrianus, Chanlo, Christophe
• Granted Patent: US 8,330,475 B2
• Time in Patent Office: Days
• US Class Current: 333/32
• CPC Class Codes: H03H 7/40 Automatic matching of load impedance to source impedance
• CPC Class Codes: H04B 1/0458 Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages matching circuits in general H03H

Abstract

The invention relates to an antenna which is coupled to an RF amplifier. Environmental conditions change the impedance of the antenna, which reduces output power, efficiency and linearity. A circuit is provided which is designed to detect the impedance of the antenna. With the measured impedance, impedance matching can be accomplished. The circuit for detecting the impedance detects the signal travelling from the RF amplifier to the antenna, and measures the peak voltage and the peak current of this signal. Furthermore, the phase difference between the voltage and the current is measured. The advantage of the circuit is its compactness allowing for an easy integration on a chip. Furthermore, an impedance matching circuit is suggested which makes use of the above circuit for detecting the impedance.

Claims

1. Circuit for detecting a magnitude and a phase of an impedance of a load the load being connectable to a radio frequency amplifier by means of a feed line the circuit comprising:

a) first means for sensing the peak value of the output voltage of the RF amplifier

b) second means for sensing the peak value of the output current of the RF amplifier and

c) third means for

c1) measuring a signal whose value depends on the phase between output voltage and output current, or

c2) deriving the phase between output voltage and output current by means of linear multiplication.

d) whereby the first means and/or the second means comprise

d1) a mixer and an amplitude limiter or

d2) a peak diode detector

2. Circuit according to claim 1, whereby the third means comprise a phase shifter and a mixer

3. Circuit according to claim 1, whereby the feed line comprises either an inductance or a capacitance and whereby the third means comprise two amplitude limiters and a mixer

4. Circuit according to claim 1, whereby the first means and the second means comprise buffer amplifiers

5. Circuit according to claim 1, whereby the RF amplifier comprises an array of at least two transistors, whereby the first means arranged to sense the collector voltage of one of the transistors and whereby the second means is arranged to sense the corresponding collector current.

6. Circuit according to claim 1, whereby the load line of the collector comprises a sense resistor

7. Circuit according to claim 1, whereby the RF amplifier comprises an array of at least two transistors, whereby the first means is arranged to sense the collector voltage of one of the transistors and whereby the second means is arranged to sense the corresponding emitter current.

8. Circuit according to claim 1, whereby the first means comprises a pick-up coil arranged to sense the collector current of a transistor being part of the RF amplifier

9. Impedance matching circuit for matching the impedance of a load the impedance of a RF amplifier whereby the load is connectable to a radio frequency amplifier by means of a feed line

with an adaptive output network connected in between the RF amplifier and the load

with an impedance detector being coupled to a node of the feed line and

with a control unit to adjust the adaptive matching circuit in response to the measured impedance.

whereby the detector is a circuit according to claim 1.

10. Impedance matching circuit according to claim 9, whereby the node is located between the RF amplifier and the adaptive output network

11. Impedance matching circuit according to claim 10, whereby the node is located between the adaptive output network and the load