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Method and circuit for down-converting a signal

  • US 20080272441A1
  • Filed: 01/09/2008
  • Published: 11/06/2008
  • Est. Priority Date: 10/21/1998
  • Status: Active Grant
First Claim
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1. A metal oxide semiconductor field effect transistor having a reduced gate extension and reduced gate pad extension, comprising:

  • a source region;

    a drain region;

    a channel region disposed between said source and drain regions;

    an insulating layer disposed above said channel region;

    a gate disposed above said insulating layer, said gate including a gate region disposed above said channel region and above a portion of said source and drain regions, said gate region including first and second ends disposed opposite one another, said gate including a gate pad extension coupled between said gate region first end and a gate pad, said gate pad extension and said gate pad extending over a first area adjacent to said channel region, said gate including a gate extension coupled to said gate region second end and extending over a second area adjacent to said channel region;

    wherein said gate pad extension and/or said gate extension are minimized in length and/or area, thereby reducing parasitic capacitances.

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