Interrupt/Wake-Up of an Electronic Device in a Low Power Sleep Mode When Detecting a Sensor or Frequency Source Activated Frequency Change

• US 20080272836A1
• Filed: 04/25/2008
• Published: 11/06/2008
• Est. Priority Date: 05/03/2007
• Status: Active Grant

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: Microchip Technology Incorporated
• Inventors: Curtis, Keith, Charais, John, Smit, Zacharias Marthinus, Simons, James (Jim), Zdenek, Jerrold S.
• Granted Patent: US 8,065,546 B2
• Time in Patent Office: Days
• US Class Current: 327/544
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices
• CPC Class Codes: G06F 1/325 Power saving in peripheral device
• CPC Class Codes: G06F 1/3259 Power saving in cursor control device, e.g. mouse, joystick, trackball
• CPC Class Codes: G06F 1/3262 Power saving in digitizer or tablet
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: H05B 47/11 by determining the brightness or colour temperature of ambient light
• CPC Class Codes: Y02B 20/40 Control techniques providing energy savings, e.g. smart controller or presence detection
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Activation of an external sensor coupled to an electronic device will change the frequency of a low power oscillator in the electronic device that runs during a low power sleep mode of the electronic device. When a change in frequency of the low power oscillator is detected, the electronic device will wake-up from the low power sleep mode. In addition, when a change in frequency from an external frequency source is detected, the electronic device will wake-up from the low power sleep mode.

Claims

1. An electronic device having a low power sleep mode, comprising:

circuits capable of being placed in a sleep mode;

input-output (I/O) capable of being placed in the sleep mode, the I/O coupled to the circuits;

sleep/wake-up logic for controlling when the circuits and the I/O are in the sleep mode or in an operational mode;

a frequency differentiator having an output coupled to the circuits, the output presenting output values representative of frequencies at an input of the frequency differentiator;

an external frequency source connection adapted for coupling to an external frequency source and coupled to the input of the frequency differentiator;

wherein

the frequency differentiator output is at a first output value when the external frequency source is at a first frequency, and

the frequency differentiator output is at a second output value when the external frequency source is at a second frequency; and

a watchdog timer coupled to the sleep/wake-up logic, wherein the watchdog timer periodically causes the sleep/wake-up logic to wake up the circuits and the I/O from the sleep mode to the operational mode for a certain time so that the circuits can sample the output values from the frequency differentiator, wherein when a present output value sample is different then a prior output value sample, then the circuits and the I/O will remain in the operational mode.

2. The electronic device according to claim 1, wherein the prior output value sample comprises an average value of a plurality of prior output value samples taken.

3. The electronic device according to claim 1, wherein the certain time that the circuits and output are in the operational mode is substantially less time than when the circuits and the I/O are in the sleep mode.

4. The electronic device according to claim 1, wherein the frequency differentiator comprises:

a frequency reference; and

a digital comparator having a first input coupled to the frequency reference and a second input coupled to the external frequency source connection, an output of the digital comparator is the frequency differentiator output and produces the first and second output values.

5. The electronic device according to claim 1, wherein the frequency differentiator comprises:

a frequency reference;

a multiplexer having a first input coupled to the frequency reference and a second input coupled to the external frequency source connection; and

a digital scaler having an input coupled to the multiplexer, an output of the digital scaler is the frequency differentiator output and produces the first and second output values.

6. The electronic device according to claim 1, wherein the frequency differentiator comprises:

a frequency-to-voltage converter having an input coupled to the external frequency source connection;

a reference voltage; and

a voltage comparator having a first input coupled to the frequency-to-voltage converter and a second input coupled to the reference voltage, an output of the voltage comparator is the frequency differentiator output and produces the first and second output values.

7. The electronic device according to claim 6, wherein the reference voltage is from a keeper cell.

8. The electronic device according to claim 1, wherein the frequency differentiator comprises:

a frequency selective filter coupled to the external frequency source connection; and

a frequency amplitude detector coupled to the frequency selective filter, an output of the frequency amplitude detector is the frequency differentiator output and produces the first and second output values.

9. The electronic device according to claim 8 wherein the frequency selective filter is a high-pass frequency filter.

10. The electronic device according to claim 8 wherein the frequency selective filter is a low-pass frequency filter.

11. The electronic device according to claim 8, wherein the frequency selective filter is a band-pass frequency filter.

12. The electronic device according to claim 1, wherein the frequency differentiator comprises:

a frequency selective filter coupled to the external frequency source connection;

a frequency amplitude rectifier coupled to the frequency selective filter;

a reference voltage; and

a voltage comparator having a first input coupled to the frequency amplitude rectifier and a second input coupled to the reference voltage, an output of the voltage comparator is the frequency differentiator output and produces the first and second output values.

13. The electronic device according to claim 12, wherein the frequency selective filter is a high-pass frequency filter.

14. The electronic device according to claim 12, wherein the frequency selective filter is a low-pass frequency filter.

15. The electronic device according to claim 12, wherein the frequency selective filter is a band-pass frequency filter.

16. The electronic device according to claim 12, wherein the reference voltage is from a keeper cell.

17. The electronic device according to claim 1, wherein the frequency differentiator comprises:

a counter coupled to the external frequency source connection;

a period timer coupled to the counter;

a register coupled to the counter and the period timer, an output of the register is the frequency differentiator output and produces the first and second output values.

18. The electronic device according to claim 1, wherein the circuits and I/O comprise digital circuits and digital I/O.

19. The electronic device according to claim 18, wherein the circuits and I/O further comprise analog circuits and analog I/O.

20. The electronic device according to claim 1, wherein the frequency differentiator, the sleep/wake-up logic and the watchdog timer are low power circuits of the electronic device that remain operational at all times.

21. The electronic device according to claim 1, wherein the first frequency is greater than the second frequency.

22. The electronic device according to claim 1, wherein the first frequency is less than the second frequency.

23. The electronic device according to claim 1, wherein the first output value is a logic zero and the second output value is a logic one.

24. The electronic device according to claim 1, wherein the first output value is a logic one and the second output value is a logic zero.

25. The electronic device according to claim 1, wherein the external frequency source is a frequency shift keying (FSK) signal.

26. The electronic device according to claim 1, wherein the external frequency source is a pulse width modulation (PWM) signal.

27. The electronic device according to claim 18, wherein some of the digital circuits comprise a digital processor and memory.

28. The electronic device according to claim 27, wherein a software program controlling the digital processor makes a comparison between the present output value sample and the prior output value sample, and determines if there is any difference therebetween.

29. The electronic device according to claim 27, wherein the digital processor is selected from the group consisting of a microprocessor, a microcontroller, a digital signal processor, and a programmable logic array.

30. The electronic device according to claim 27, wherein the memory is volatile memory and is selected from the group consisting of static random access memory (RAM) and dynamic RAM.

31. The electronic device according to claim 27, wherein the memory is non-volatile memory and is selected from the group consisting of read only memory (ROM), FLASH memory, and electrically erasable and programmable read only memory (EEPROM).

32. The electronic device according to claim 1, wherein the circuits, the I/O, the sleep/wake-up logic, the watchdog timer and the frequency differentiator are fabricated on at least one integrated circuit die.

33. The electronic device according to claim 32, wherein the at least one integrated circuit die is packaged in an integrated circuit package with the external frequency source connection on the integrated circuit package.

34. A method for waking up circuits of an electronic device when in a low power sleep mode, the method comprising the steps of:

providing circuits and input-output (I/O) capable of being placed in a low power sleep mode;

providing sleep/wake-up logic for controlling when the circuits and I/O are in the low power sleep mode or in an operational mode;

providing a frequency differentiator having a first or second output value depending upon whether an external frequency source is at a first or second frequency, respectively;

providing a watchdog timer for periodically causing the sleep/wake-up logic to wake up the circuits and the I/O from the sleep mode to the operational mode for a certain time so that the circuits can sample the output values from the frequency differentiator, wherein when a present output value sample is different then a prior output value sample, then the circuits and the I/O will remain in the operational mode.

35. The method according to claim 34, wherein the prior frequency differentiator sample comprises an average value of a plurality of prior frequency differentiator samples taken.

36. The method according to claim 34, wherein the certain time that the circuits and output are in the operational mode is substantially less time than when the circuits and the I/O are in the sleep mode.