MULTI-LEVEL CELL ACCESS BUFFER WITH DUAL FUNCTION
First Claim
1. An access buffer for writing to a non-volatile memory, the access buffer comprising:
- a single-ended input for receiving a single-ended input signal having an input bit to be written to the memory;
a first latch for latching the input bit, the first latch having a double-ended input for receiving a double-ended input signal containing the input bit;
a second latch for latching a value read from a lower page of a memory location of the non-volatile memory; and
a complement signal producer for producing a complement of the single-ended input signal, the double-ended input signal comprising the complement of the single-ended input signal and the single-ended input signal.
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Accused Products
Abstract
An access buffer, such as page buffer, for writing to non-volatile memory, such as Flash, using a two-stage MLC (multi-level cell) operation is provided. The access buffer has a first latch for temporarily storing the data to be written. A second latch is provided for reading data from the memory as part of the two-stage write operation. The second latch has an inverter that participates in the latching function when reading from the memory. The same inverter is used to produce a complement of an input signal being written to the first latch with the result that a double ended input is used to write to the first latch.
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Citations
19 Claims
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1. An access buffer for writing to a non-volatile memory, the access buffer comprising:
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a single-ended input for receiving a single-ended input signal having an input bit to be written to the memory; a first latch for latching the input bit, the first latch having a double-ended input for receiving a double-ended input signal containing the input bit; a second latch for latching a value read from a lower page of a memory location of the non-volatile memory; and a complement signal producer for producing a complement of the single-ended input signal, the double-ended input signal comprising the complement of the single-ended input signal and the single-ended input signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for writing to a non-volatile memory, the method comprising:
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receiving a single-ended input signal having an input bit to be written to the memory; producing a complement of the single-ended input signal using an input inverter comprising a driving inverter, the complement of the single-ended input signal and the single-ended input signal in combination forming a double-ended input signal; latching the input bit into a first latch having a double-ended input for receiving a double-ended input signal containing the input bit; and latching a value read from a lower page of a memory location of the non-volatile memory into a second latch comprising the driving inverter. - View Dependent Claims (12, 13, 14, 15)
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16. A memory system having an access buffer for writing to a non-volatile memory structure, the access buffer comprising:
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a single-ended input for receiving a single-ended input signal having an input bit to be written to the memory structure; a first latch for latching the input bit, the first latch having a double-ended input for receiving a double-ended input signal containing the input bit; a second latch for latching a value read from a lower page of a memory location of the non-volatile memory structure; and a complement signal producer for producing a complement of the single-ended input signal, the double-ended input signal comprising the complement of the single-ended input signal and the single-ended input signal. - View Dependent Claims (17, 18, 19)
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Specification