Novel Methodology To Realize Automatic Virtual Metrology

• US 20080275586A1
• Filed: 02/05/2008
• Published: 11/06/2008
• Est. Priority Date: 05/04/2007
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lin, Chun-Hsien, Yu, Chen-Hua, Ko, Francis, Lo, Henry, Wang, Jean, Zuo, Kewei, Lai, Chih-Wei, Chen, Ping-Hsu
• Granted Patent: US 8,682,466 B2
• Time in Patent Office: Days
• US Class Current: 700/110
• CPC Class Codes: G05B 23/0221 Preprocessing measurements, e.g. data collection rate adjustment; Standardization of measurements; Time series or signal analysis, e.g. frequency analysis or wavelets; Trustworthiness of measurements; Indexes therefor; Measurements using easily measured parameters to estimate parameters difficult to measure; Virtual sensor creation; De-noising; Sensor fusion; Unconventional preprocessing inherently present in specific fault detection methods like PCA-based methods

Abstract

A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on the key parameters; and predicting wafer results using the virtual metrology.

Claims

1. A method for semiconductor wafer result prediction, comprising:

collecting manufacturing data from various semiconductor manufacturing tools and metrology tools;

choosing key parameters using an autokey method based on the manufacturing data;

building a virtual metrology based on the key parameters; and

predicting wafer results using the virtual metrology.

2. The method of claim 1, wherein the performing of the autokey analysis comprises:

grouping various manufacturing processing parameters by a hierarchical clustering method;

combining the various manufacturing parameters to form various representative parameters; and

choosing the key parameters from the various representative parameters according to correlation coefficients.

3. The method of claim 1, wherein the selecting of the key parameters further comprises using a hierarchical clustering method.

4. The method of claim 1, wherein the selecting of the key parameters further comprises using a correlation distance as a selection threshold.

5. The method of claim 1, wherein the selecting of the key parameters further comprises selecting key steps.

6. The method of claim 1, wherein the manufacturing data comprises fault detection and classification (FDC) data.

7. The method of claim 6, wherein the selecting of the key parameters comprises:

collecting time series data for the various manufacturing parameters from the FDC data;

transferring the time series data into summarized data; and

performing an autokey analysis to the summarized data to select the key parameters.

8. The method of claim 7, wherein the summarized data are selected from the group consisting of an average value, a maximum value, a minimum value, a standard deviation, and combinations thereof.

9. The method of claim 7, wherein the various manufacturing parameters comprises active parameters and passive parameters.

10. The method of claim 1, wherein one of the key parameters is a function of a subset of the various parameters.

11. The method of claim 1, wherein one of the key parameters is associated with a root cause of wafer fault.

12. The method of claim 1, wherein the virtual metrology comprises:

a first level model with input from the manufacturing data and output as physical parameters; and

a second level model with input from the physical parameters and output as electrical parameters.

13. The method of claim 1, wherein the collecting of the manufacturing data further comprising:

defining good data and bad fault detection and classification (FDC) data from the manufacturing data;

enhancing abnormal tool parameter capture rate by performing a pretreatment to the good and bad data; and

performing self classification analysis based on n-sigma deviation between the good data and bad data.

14. A wafer result prediction system, comprising:

a first module designed for determining physical parameters based on manufacturing data; and

a second module designed for determining electrical parameters based on the physical parameters and the manufacturing data.

15. The wafer result prediction system of claim 14, wherein each of the physical parameters is expressed in manufacturing parameters associated with the manufacturing data.

16. The wafer result prediction system of claim 14, wherein one of the electrical parameters is expressed in the manufacturing parameters.

17. The wafer result prediction system of claim 14, wherein one of the electrical parameters is expressed in the physical parameters.

18. The wafer result prediction system of claim 14, further comprises an evaluation module to value the electrical parameters for wafer acceptance according to predefined criteria.

19. A system for wafer result prediction, comprising:

a data collector designed for collecting manufacturing data, the manufacturing data including tool data from processing tools and wafer data from metrology tools;

a key parameter module designed for identifying key parameters based on the manufacturing data and a hierarchical clustering method;

a virtual metrology module constructed based on the key parameters, wherein the virtual metrology module includes

a first model having the manufacturing data as input and physical parameters as output; and

a second model having the physical parameters as input and electrical parameters as output; and

a prediction module designed for predicting wafer results by utilizing the virtual metrology module.

20. The system of claim 19, wherein the key parameter module is designed to identify the key parameters using a hierarchical clustering method.