SYSTEM ON A CHIP FOR NETWORKING

• US 20080276018A1
• Filed: 07/23/2008
• Published: 11/06/2008
• Est. Priority Date: 05/18/2001
• Status: Active Grant

• Current Assignee: Broadcom Corporation (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Hayter, Mark D., Rowlands, Joseph B., Cho, James Y.
• Granted Patent: US 7,660,931 B2
• Time in Patent Office: Days
• US Class Current: 710/62
• CPC Class Codes: G06F 13/387 for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system

Abstract

A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Claims

1. A network device comprising:

a system chip to provide network and non-network interfaces for the network device, in which the system chip includes;

(a) one or more processors coupled to an internal bus of the system chip;

(b) a cache memory coupled to the bus to cache data for the system chip;

(c) a plurality of interface circuits to transfer packet and non-packet data, wherein each interface circuit is to operate upon a particular mode of communication to transfer respective packet or non-packet data, in which one or more external devices are to be coupled to respective one of the interface circuits based on respective mode of communication for transfer of respective data, wherein the network and non-network interfaces of the network device are provided by the plurality of interface circuits; and

(d) a bridge circuit coupled to the plurality of interface circuits and to the bus to transfer data between the interface circuits and the bus, the bridge circuit to maintain cache coherency for data cached in the cache memory for devices operable within the system chip, but cache coherency is not maintained by the bridge circuit for data cached in the cache memory by one or more external devices coupled to the interface circuits, wherein the one or more processors, cache memory, plurality of interface circuits and bridge circuit of the system chip are constructed on one integrated circuit chip as an integrated system on a chip; and

at least one other integrated circuit chip coupled to the system chip to provide additional functionality for the network device in addition to the system chip.

2. The network device of claim 1 further comprising a memory controller coupled to the bus to control transfer of data between the system chip and an external memory when the external memory is coupled to the system chip.

3. The network device of claim 1, wherein one of the interface circuits is a HyperTransport compatible interface.

4. The network device of claim 1, wherein one of the interface circuits is a Peripheral Component Interconnect compatible interface.

5. The network device of claim 1, wherein one of the interface circuits is a Lightning Data Transport interface.

6. The network device of claim 1, wherein one of the interface circuits is a Media Independent Interface compatible interface or a Gigabit Media Independent Interface compatible interface.

7. The network device of claim 1, wherein one of the interface circuits is a serial interface.

8. The network device of claim 1, wherein one of the interface circuits is a Personal Computer Memory Card International Association compatible interface.

9. The network device of claim 1, wherein one of the interface circuits is a system management bus interface.

10. The network device of claim 1, wherein the network device is a router.

11. The network device of claim 1, wherein the network device is a firewall for a network.

12. The network device of claim 1, wherein the at least one other integrated circuit chip is an encryption/decryption engine for the system chip.