Adaptive-Allocation Of I/O Bandwidth Using A Configurable Interconnect Topology
First Claim
1. An integrated circuit comprising:
- an interface including a first and second portion; and
a register to store a value that indicates at least one of a first and second mode of operation, whereinduring the first mode of operation, the first and second interface portions transmit and receive signals, andduring the second mode of operation, the first interface portion transmits unidirectional signals and the second interface portion receives unidirectional signals.
0 Assignments
0 Petitions
Accused Products
Abstract
Apparatus and methods allocate I/O bandwidth of an electrical component, such as an IC, by configuring an I/O interface into various types of interfaces. In an embodiment of the present invention, an I/O interface is configured into either a bi-directional contact, unidirectional contact (including either a dedicated transmit or dedicated receive contact) or a maintenance contact used in a maintenance or calibration mode of operation. The I/O interface is periodically reconfigured to optimally allocate I/O bandwidth responsive to system parameters, such as changing data workloads in the electronic components. System parameters include, but are not limited to, 1) number of transmit-receive bus turnarounds; 2) number of transmit and/or receive data packets; 3) user selectable setting 4) number of transmit and/or receive commands; 5) direct requests from one or more electronic components; 6) number of queued transactions in one or more electronic components; 7) transmit burst-length setting, 8) duration or cycle count of bus commands, and control strobes such as address/data strobe, write enable, chip select, data valid, data ready; 9) power and/or temperature of one or more electrical components; 10) information from executable instructions, such as a software application or operating system; 11) multiple statistics over respective periods of time to determine if using a different bandwidth allocation would result in better performance. The importance of a system parameter may be weighted over time in an embodiment of the present invention.
-
Citations
20 Claims
-
1. An integrated circuit comprising:
-
an interface including a first and second portion; and a register to store a value that indicates at least one of a first and second mode of operation, wherein during the first mode of operation, the first and second interface portions transmit and receive signals, and during the second mode of operation, the first interface portion transmits unidirectional signals and the second interface portion receives unidirectional signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 17)
-
-
16. An integrated circuit comprising:
-
an interface including a first and second portion; a register to store a value that indicates at least one of a first and second mode of operation; and a control circuit to output the value in response to a comparison of a measured value and a threshold value, wherein during the first mode of operation, the first and second interface portions transmit and receive signals, and during the second mode of operation, the first interface portion transmits unidirectional signals and the second interface portion receives unidirectional signals. - View Dependent Claims (18, 19, 20)
-
Specification