Processor Dedicated Code Handling in a Multi-Processor Environment

• US 20080276232A1
• Filed: 07/15/2008
• Published: 11/06/2008
• Est. Priority Date: 09/25/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: International Business Machines Corporation
• Inventors: Nutter, Mark Richard, Stafford, James Michael, Aguilar, Maximino
• Granted Patent: US 8,219,981 B2
• Time in Patent Office: Days
• US Class Current: 717/149
• CPC Class Codes: G06F 2209/509 Offload
• CPC Class Codes: G06F 9/5044 considering hardware capabilities

Abstract

Code handling, such as interpreting language instructions or performing “just-in-time” compilation, is performed using a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of the processors is programmed to perform a dedicated code-handling task, such as perform just-in-time compilation or interpretation of interpreted language instructions, such as Java. The other processors request code handling processing that is performed by the dedicated processor. Speed is achieved using a shared memory map so that the dedicated processor can quickly retrieve data provided by one of the other processors.

Claims

1. An information handling system comprising:

a plurality of heterogeneous processors;

a common memory shared by the plurality of heterogeneous processors;

a first processor selected from the plurality of heterogeneous processors that sends a code processing request to a second processor, the second processor also being selected from the plurality of heterogeneous processors, wherein the first processor executes a first instruction set and wherein the second processor executes a second instruction set;

a first local memory accessible to the first processor;

a second local memory accessible to the second processor;

a direct memory access (DMA) controller associated with the second processor, the DMA controller adapted to transfer data between the common memory and the second processor'"'"'s local memory; and

a processing tool for processing software code, the processing tool including software effective to;

load a virtual machine engine into the common memory;

load, by the first processor, virtual machine code into the common memory, the virtual machine code adapted to be processed by the virtual machine engine;

write, by the first processor, the code processing request into a mailbox associated with the second processor;

receive, by the second processor, the code processing request from the second processor'"'"'s mailbox;

in response to receiving the code processing request, load, at the second processor, the virtual machine engine from the common memory into the second local memory;

in further response to receiving the code processing request, read, by the second processor from the common memory, software code data corresponding to the code processing request, the software code data including the virtual machine code;

write the software code data corresponding to the code processing request to the second local memory;

process the software code data by the second processor, wherein the processing includes processing the virtual machine code at the second processor using the virtual machine engine, the processing resulting in executable instructions, the executable instructions comprising instructions from the first instruction set and capable of being executed by the first processor;

write the executable instructions to a memory location accessible by the first processor; and

execute, at the first processor, the executable instructions.

2. The information handling system as described in claim 1 further comprising software code effective to:

write data resulting from the executing to the common memory.

3. The information handling system as described in claim 1 further comprising software code effective to:

prior to loading the virtual machine code into the common memory;

run a first application program;

in response to running the first application program, identify a call to a software effect corresponding to the software code data; and

load the software code data into the common memory, wherein the processing of the software code data occurs during the running of the first application program and wherein the processing is completed prior to the first program calling the software effect.

4. The information handling system as described in claim 3 further comprising software code effective to:

receive, at the first processor, the executable instructions resulting from the processing performed by the second processor, wherein the executable instructions are adapted to perform a multimedia effect; and

perform the multimedia effect on the first processor by executing the received executable instructions.

5. The information handling system as described in claim 1 wherein writing the executable instructions to a memory location accessible by the first processor further comprises software code effective to:

write the executable instructions to a memory location accessible by the first processor using a direct memory access (DMA) operation.

6. The information handling system as described in claim 5 wherein the memory location is selected from the group consisting of the first local memory and the common memory.

7. The information handling system as described in claim 1 further comprising software code effective to:

write the executable instructions to the common memory; and

notify the first processor that the executable instructions have been written.

8. A computer program product stored on a computer operable media, the computer operable media containing instructions for execution by a computer, which, when executed by the computer, cause the computer to perform a method for processing software code, said method comprising:

loading a virtual machine engine into a common memory, the common memory accessible by a first processor and a second processor, wherein the first processor and the second processor are heterogeneous processors, wherein the first processor executes a first instruction set and wherein the second processor executes a second instruction set, and wherein the first processor includes a first local memory accessible to the first processor and the second processor includes a second local memory accessible to the second processor;

loading, by the first processor, virtual machine code into the common memory, the virtual machine code adapted to be processed by the virtual machine engine;

writing, by the first processor, a code processing request into a mailbox associated with the second processor;

receiving, by the second processor, the code processing request from the second processor'"'"'s mailbox;

in response to receiving the code processing request, loading, at the second processor, the virtual machine engine from the common memory into the second local memory;

in further response to receiving the code processing request, reading, by the second processor from the common memory, software code data corresponding to the code processing request, the software code data including the virtual machine code;

writing the software code data corresponding to the code processing request to the second local memory;

processing the software code data by the second processor, wherein the processing includes processing the virtual machine code at the second processor using the virtual machine engine, the processing resulting in executable instructions, the executable instructions comprising instructions from the first instruction set and capable of being executed by the first processor;

writing the executable instructions to a memory location accessible by the first processor; and

executing, at the first processor, the executable instructions.

9. The computer program product as described in claim 8 further comprising:

writing data resulting from the executing to the common memory.

10. The computer program product as described in claim 8 further comprising:

prior to loading the virtual machine code into the common memory;

running a first application program;

in response to running the first application program, identifying a call to a software effect corresponding to the software code data; and

loading the software code data into the common memory, wherein the processing of the software code data occurs during the running of the first application program and wherein the processing is completed prior to the first program calling the software effect.

11. The computer program product as described in claim 10 further comprising:

receiving, at the first processor, the executable instructions resulting from the processing performed by the second processor, wherein the executable instructions are adapted to perform a multimedia effect; and

performing the multimedia effect on the first processor by executing the received executable instructions.

12. The computer program product as described in claim 8 wherein the writing further comprises:

writing the executable instructions to a memory location accessible by the first processor using a direct memory access (DMA) operation.

13. The computer program product as described in claim 12 wherein the memory is selected from the group consisting of the first local memory and the common memory.

14. The computer program product as described in claim 8 further comprising:

writing the executable instructions to the common memory; and

notifying the first processor that the executable instructions have been written.