THIN FILM TRANSISTOR AND ORGANIC LIGHT EMITTING DISPLAY USING THE SAME

• US 20080277657A1
• Filed: 05/09/2008
• Published: 11/13/2008
• Est. Priority Date: 05/10/2007
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Park, Jin-seong, Jeong, Jae-kyeong, Shin, Hyun-soo, Mo, Yeon-gon, Lee, Hun-jung, Jeong, Jong-han
• Granted Patent: US 7,915,101 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

Thin film transistors and organic light emitting displays using the same are provided. The thin film transistor may include a substrate, a semiconductor layer, a gate electrode, and source/drain electrodes on the substrate. The semiconductor layer is composed of a P-type semiconductor layer obtained by diffusing phosphorus into a zinc oxide semiconductor. The phosphorus is doped in the semiconductor layer to a concentration ranging from about 1×10¹⁴ to about 1×10¹⁸ cm⁻³.

Claims

1. A thin film transistor, comprising:

a substrate;

a semiconductor layer on the substrate, the semiconductor layer comprising a P-type semiconductor layer comprising a zinc oxide semiconductor and phosphorus diffused in the zinc oxide semiconductor, wherein the phosphorus is diffused in the zinc oxide semiconductor to a concentration ranging from about 1×

10¹⁴ to about 1×

10¹⁸ cm<sup>−

3</sup>;

a gate electrode on the substrate; and

source/drain electrodes on the substrate.

2. The thin film transistor as claimed in claim 1, wherein the zinc oxide semiconductor is selected from the group consisting of ZnO, ZnGaO, AnInO, In₂O₃, ZnInGaO, ZnSnO, and combinations thereof.

3. A method of manufacturing a thin film transistor, comprising:

patterning a gate electrode on a substrate;

forming a gate insulating layer on the gate electrode;

forming a semiconductor layer on the gate insulating layer, the semiconductor layer comprising a zinc oxide semiconductor;

diffusing a phosphorus compound in the semiconductor layer to form a P-type semiconductor layer; and

forming source/drain electrodes on the P-type semiconductor layer.

4. The method as claimed in claim 3, wherein the zinc oxide semiconductor is selected from the group consisting of ZnO, ZnGaO, AnInO, In₂O₃, ZnInGaO, ZnSnO, and combinations thereof.

5. The method as claimed in claim 3, wherein the phosphorus compound is diffused in the semiconductor layer to a phosphorus concentration ranging from about 1×

10¹⁴ to about 1×

10¹⁸ cm<sup>−

3</sup>.

6. The method as claimed in claim 3, wherein the phosphorus compound is Zn₃P₂.

7. The method as claimed in claim 3, wherein the phosphorus compound is a powder.

8. The method as claimed in claim 3, wherein diffusing the phosphorus compound in the semiconductor layer comprises arranging a mask over the semiconductor layer, the mask having an opening in a region corresponding to the semiconductor layer.

9. A method of manufacturing a thin film transistor, comprising:

forming a semiconductor layer comprising source/drain regions and a channel region on a substrate, the semiconductor layer comprising a zinc oxide semiconductor;

diffusing a phosphorus compound in the semiconductor layer to form a P-type semiconductor layer;

forming a gate insulating layer on the semiconductor layer;

forming a gate electrode on the gate insulating layer in a region corresponding to the channel region of the semiconductor layer;

forming an interlayer insulation layer on the gate electrode; and

electrically coupling source/drain electrodes to the semiconductor layer through contact holes in the gate insulating layer and the interlayer insulation layer.

10. The method as claimed in claim 9, wherein the phosphorus compound is diffused in the semiconductor layer to a phosphorus concentration ranging from about 1×

10¹⁴ to about 1×

10¹⁸ cm<sup>−

3</sup>.

11. The method as claimed in claim 9, wherein the phosphorus compound is Zn₃P₂.

12. The method as claimed in claim 9, wherein the phosphorus compound is a powder.

13. The method as claimed in claim 9, wherein the zinc oxide semiconductor is selected from the group consisting of ZnO, ZnGaO, AnInO, In₂O₃, ZnInGaO, ZnSnO, and combinations thereof.

14. The method as claimed in claim 9, wherein diffusing the phosphorus compound in the semiconductor layer comprises arranging a mask over the semiconductor layer, the mask having an opening in a region corresponding to the semiconductor layer.

15. An organic light emitting display, comprising:

a thin film transistor comprising;

a substrate,

a semiconductor layer comprising a P-type semiconductor layer comprising a zinc oxide semiconductor and phosphorus diffused in the zinc oxide semiconductor, wherein the phosphorus is diffused in the zinc oxide semiconductor to a concentration ranging from about 1×

10¹⁴to about 1×

10¹⁸ cm<sup>−

3</sup>,

a gate electrode, and

source/drain electrodes on the substrate; and

an organic light emitting diode electrically coupled to the thin film transistor.

16. The organic light emitting display as claimed in claim 15, wherein the zinc oxide semiconductor is selected from the group consisting of ZnO, ZnGaO, AnInO, In₂O₃, ZnInGaO, ZnSnO and combinations thereof.