FERROELECTRIC MEMORY DEVICE, FERROELECTRIC MEMORY MANUFACTURING METHOD, AND SEMICONDUCTOR MANUFACTURING METHOD

• US 20080277706A1
• Filed: 07/22/2008
• Published: 11/13/2008
• Est. Priority Date: 01/26/2006
• Status: Active Grant

• Current Assignee: Fujitsu Semiconductor Memory Solution Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: SASHIDA, Naoya, MATSUURA, Katsuyoshi
• Granted Patent: US 7,893,472 B2
• Time in Patent Office: Days
• US Class Current: 257/295
• CPC Class Codes: H01L 28/57 comprising a barrier layer to prevent diffusion of hydrogen or oxygen
• CPC Class Codes: H01L 28/65 comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)
• CPC Class Codes: H10B 53/30 characterised by the memory core region

Abstract

A ferroelectric memory device manufacturing method includes the steps of forming an interlayer isolating film for covering a transistor formed on a semiconductor substrate; forming a conductive plug in the interlayer insulating film to contact a diffusion region of the transistor formed on the semiconductor substrate; forming a ferroelectric capacitor including a lower electrode, a ferroelectric film and an upper electrode; and forming a compound film including silicon (Si) and a CH group on a surface of the interlayer insulating film and a surface of the conductive plug by depositing a Si compound containing Si atoms and the CH groups; wherein the compound film is formed after forming the conductive plug, and the compound film is formed before forming the lower electrode; and a self-orientation film is formed on a surface of the compound film.

Claims

1. A ferroelectric memory device manufacturing method, comprising:

forming an interlayer isolating film for covering a transistor formed over a semiconductor substrate;

forming a conductive plug in the interlayer insulating film to contact a diffusion region of the transistor formed on the semiconductor substrate;

forming a ferroelectric capacitor over the conductive plug by stacking in the order of a lower electrode, a ferroelectric film and an upper electrode; and

forming a compound film including silicon (Si) and a CH group on a surface of the interlayer insulating film and a surface of the conductive plug by depositing an Si compound containing Si atoms and the CH groups after forming the conductive plug and before forming the lower electrode; and

forming a self-orientation film on a surface of the compound film.

2. The ferroelectric memory device manufacturing method as claimed in claim 1, wherein the Si compound comprises hexamethyldisilazane.

3. The ferroelectric memory device manufacturing method as claimed in claim 1, wherein the self-orientation film is formed at a temperature equal to or less than approximately 300°

C.

4. The ferroelectric memory device manufacturing method as claimed in claim 3, wherein the self-orientation film is formed of a Ti film using a sputtering technique.

5. A manufacturing method of a semiconductor device including a functional film, comprising:

forming an interlayer isolating film for covering a transistor formed over a semiconductor substrate;

forming a conductive plug in the interlayer insulating film to contact a diffusion region of the transistor formed on the semiconductor substrate;

forming a functional film over the conductive plug; and

forming a compound film including silicon (Si) and a CH group on a surface of the interlayer insulating film and a surface of the conductive plug by depositing an Si compound containing Si atoms and the CH groups after forming the conductive plug and before forming the functional film; and

forming a self-orientation film over a surface of the compound film.

6. A ferroelectric memory device, comprising:

a semiconductor substrate;

a transistor formed on the semiconductor substrate, the transistor including a first diffusion region and a second diffusion region;

an interlayer insulating film formed over the semiconductor substrate for covering the transistor;

a conductive plug formed in the interlayer insulating film to contact the first diffusion region; and

a ferroelectric capacitor formed over the interlayer insulating film, the ferroelectric capacitor contacting the conductive plug;

wherein the ferroelectric capacitor is inserted between an upper electrode and a lower electrode, the lower electrode being in electrical contact with the conductive plug;

a SiOC film is formed between the conductive plug and the lower electrode; and

a self-orientation film including a self-orientation material is formed in between the SiOC film and the lower electrode.