HIGH-SENSITIVITY OPTICAL SCANNING USING MEMORY INTEGRATION
First Claim
Patent Images
1. A single chip integrated circuit suitable for use in an imaging system and comprising:
- a CMOS integrated circuit having integrally formed thereon;
an at least two dimensional array of photosensors;
at least one A/D converter receiving outputs from said at least two dimensional array of photosensors;
a plurality of digital registers temporarily storing the outputs of said A/D converters;
a digital memory storing image data provided by said array; and
a plurality of digital adders adding the outputs of said digital registers to corresponding image data stored in said digital memory.
2 Assignments
0 Petitions
Accused Products
Abstract
An inspection system includes a CMOS integrated circuit having integrally formed thereon an at least two dimensional array of photosensors and providing an inspection output representing an object to be inspected. A defect analyzer is operative to receive the inspection output and to provide a defect report.
40 Citations
3 Claims
-
1. A single chip integrated circuit suitable for use in an imaging system and comprising:
- a CMOS integrated circuit having integrally formed thereon;
an at least two dimensional array of photosensors;
at least one A/D converter receiving outputs from said at least two dimensional array of photosensors;
a plurality of digital registers temporarily storing the outputs of said A/D converters;
a digital memory storing image data provided by said array; and
a plurality of digital adders adding the outputs of said digital registers to corresponding image data stored in said digital memory.
- a CMOS integrated circuit having integrally formed thereon;
-
2. An imaging device, comprising:
- an array of sensor elements, arranged in a matrix of sensor rows and sensor columns, each such sensor element being adapted to output a signal responsive to radiation incident thereon;
a memory, comprising memory cells arranged in memory rows and memory columns, each such memory cell being adapted to store a signal value;
one or more adders, adapted to sum the signal output by the sensing elements with the signal value stored in the memory cells; and
timing circuitry, coupled to control the array, memory and adders, and adapted to generate an input pointer and an array clock having clock cycles, such that at each cycle of the array clock, the signal from the sensor elements in each of the sensor rows is summed by the adders with the stored signal value in the cells in a respective one of the memory rows that is determined by the input pointer, thus generating summed signal values that are stored in the memory cells, the timing circuitry further being adapted to advance the input pointer in successive cycles of the array clock so that the summed signal value stored in each of the memory cells comprises a sum of the signals output by a plurality of the sensing elements in a given one of the sensor columns.
- an array of sensor elements, arranged in a matrix of sensor rows and sensor columns, each such sensor element being adapted to output a signal responsive to radiation incident thereon;
-
3. A method for imaging, using an array of sensor elements, arranged in a matrix of sensor rows and sensor columns, each such sensor element being adapted to output a signal responsive to radiation incident thereon, and a memory, which includes memory cells arranged in memory rows and memory columns, each such memory cell being adapted to store a signal value, the method comprising:
- generating an array clock having clock cycles and an input pointer that points to one or more of the memory rows;
at each cycle of the array clock, summing the signal output by the sensing elements in each of the sensor rows with the signal value stored in the memory cells in a respective one of the memory rows that is determined by the input pointer, thus generating summed signal values that are stored in the memory cells; and
advancing the input pointer in successive cycles of the array clock so that the summed signal value stored in each of the memory cells comprises a sum of the signals output by a plurality of the sensing elements in a given one of the sensor columns.
- generating an array clock having clock cycles and an input pointer that points to one or more of the memory rows;
Specification