MULTI-PROCESSOR DEVICE
First Claim
1. A multi-processor device comprising, over a single semiconductor chip:
- a plurality of processors including a first group of processors and a second group of processors;
a first bus to which the first group of processors is coupled;
a second bus to which the second group of processors is coupled;
a first external bus interface to which the first bus is coupled; and
a second external bus interface to which the second bus is coupled.
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Abstract
The present invention intends to provide a high-performance multi-processor device in which independent buses and external bus interfaces are provided for each group of processors of different architectures, if a single chip includes a plurality of multi-processor groups. A multi-processor device of the present invention comprises a plurality of processors including first and second groups of processors of different architectures such as CPUs, SIMD type super-parallel processors, and DSPs, a first bus which is a CPU bus to which the first processor group is coupled, a second bus which is an internal peripheral bus to which the second processor group is coupled, independent of the first bus, a first external bus interface to which the first bus is coupled, and a second external bus interface to which the second bus is coupled, over a single semiconductor chip.
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Citations
18 Claims
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1. A multi-processor device comprising, over a single semiconductor chip:
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a plurality of processors including a first group of processors and a second group of processors; a first bus to which the first group of processors is coupled; a second bus to which the second group of processors is coupled; a first external bus interface to which the first bus is coupled; and a second external bus interface to which the second bus is coupled. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification