Circuit Arrangement and Method For Protecting an Integrated Semiconductor Circuit

• US 20080285199A1
• Filed: 02/14/2005
• Published: 11/20/2008
• Est. Priority Date: 02/13/2004
• Status: Active Grant

• Current Assignee: ams AG (Ams-Osram AG)
• Original Assignee: ams AG (Ams-Osram AG)
• Inventors: Chojecki, Pawel, Mayerhofer, Michael, Deutschmann, Bernd, Frankhauser, Bernd
• Granted Patent: US 7,738,222 B2
• Time in Patent Office: Days
• US Class Current: 361/111
• CPC Class Codes: H01L 27/0262 including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices

Abstract

What are proposed are a circuit arrangement and a method for protecting an integrated semiconductor circuit containing a protection circuit having a thyristor structure (SCR) and also a control circuit (TC; C1, R1, I1 to I3) for driving the protection circuit, which are both connected between an element (PV, LV) to be protected and a reference potential (VB), the control circuit (TC; C1, R1, I1 to I3) generating a plurality of control signals which in each case drive an active element (T1, T2) of the thyristor structure. A targeted triggering of the protection circuit in conjunction with defined switching thresholds and short turn-on times is thereby achieved. A possibility for determining the duration of the activation of the control circuit is furthermore proposed.

Claims

1. A circuit arrangement for protecting an integrated semiconductor circuit comprising:

a protection circuit located between an element to be protected and a reference potential, the protection circuit comprising a thyristor structure that includes active elements; and

a control circuit configured to drive the protection circuit by generating a plurality of control signals to drive one or more active elements of the protection circuit.

2. The circuit arrangement of claim 1, wherein the control circuit comprises a detector circuit in parallel with the protection circuit.

3. The circuit arrangement of claim 2, wherein the detector circuit comprises a first resistive-capacitive (RC) element, the first RC element comprising a resistor and a capacitor.

4. The circuit arrangement of claim 21, wherein the switching elements comprise inverters.

5. The circuit arrangement of claim 1, wherein the active elements comprise active elements of different conductivity types and the plurality of control signals comprise a plurality of control signals for the active elements of different conductivity types, the control signals having opposite polarities that are based on conductivity types of active elements, the control signals being configured to drive control inputs of the active elements.

6. The circuit arrangement of claim 2, wherein the detector circuit of the control circuit is configured to identify a signal with a predetermined rise time at the element to be protected.

7. The circuit arrangement of claim 1, wherein the control circuit comprises a plurality of time-dependent elements configured to determine a duration of activation of the control circuit.

8. The circuit arrangement of claim 7, wherein the time-dependent elements comprise resistive-capacitive (RC) elements.

9. The circuit arrangement of claim 21, wherein the detector circuit and the switching elements each comprise individual transistors.

10. The circuit arrangement of claim 2, wherein the detector circuit is configured to identify a signal with a predetermined rise time at the element to be protected, the predetermined rise time being detection criterion of the detector circuit.

11. The circuit arrangement of claim 10, wherein the control circuit comprises at least some time-dependent elements configured to determine a duration of activation of the control circuit.

12. The circuit arrangement of claim 10, wherein the detector circuit comprises at least one resistive-capacitive (RC) element, the at least one RC element comprising a resistor and a capacitor.

13. The circuit arrangement of claim 3, further comprising:

switching elements;

driver elements connected to the switching elements, and

a second resistive-capacitive (RC) circuit, wherein a node between the detector circuit and the switching elements is electrically connected to the second RC element.

14. The circuit arrangement of claim 13, wherein the detector circuit comprises two detector subcircuits, each of the detector subcircuits configured to drive a switching element for the active elements of the protection circuit.

15. The circuit arrangement of claim 21, wherein the switching elements comprise individual metal oxide semiconductor (MOS) transistors.

16. The circuit arrangement of claim 1, further comprising switching elements and driver elements, the switching elements being electrically connected to the driver elements.

17. The circuit arrangement of claim 1, wherein control inputs of the active elements of the protection circuit comprise a semiconductor structure that includes of wells of different conductivity types, the wells including highly doped regions for output circuits of the active elements.

19. The circuit arrangement of claim 8, wherein the RC elements are configured to generate control signals for controlling a beginning of activation and an end of activation of the control circuit.

20. The circuit arrangement of claim 9, wherein the switching elements each comprise individual bipolar transistors.

21. The circuit arrangement of claim 2, wherein upon detection of a detection criterion, the control circuit is configured to drive switching elements that are configured to generate the control signals.

18. A method for protecting an integrated semiconductor circuit, the method comprising:

detecting a state of an element to be protected using a protection circuit located between the element to be protected and a reference potential, the protection circuit comprising a thyristor structure that includes active elements;

using a control circuit to generate a plurality of control signals based on a detected state of the element to be protected; and

communicating the control signals to a control input of the active elements of the protection circuit.