Memory device for repairing a neighborhood of rows in a memory array using a patch table
First Claim
1. A memory device comprising:
- a memory array;
a temporary storage area; and
circuitry operative to;
store, in the temporary storage area;
(i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N−
1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array;
write the first data in row N in the memory array; and
in response to an error in writing the first data in row N in the memory array;
write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device; and
add addresses of rows N−
1, N, and N+1 to a table stored in the memory device, wherein the table indicates which rows in the repair area should be used instead of rows N−
1, N, and N+1.
3 Assignments
0 Petitions
Accused Products
Abstract
A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N−1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N−1, N, and N+1 to a table stored in the memory device.
101 Citations
18 Claims
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1. A memory device comprising:
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a memory array; a temporary storage area; and circuitry operative to; store, in the temporary storage area;
(i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N−
1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array;write the first data in row N in the memory array; and in response to an error in writing the first data in row N in the memory array; write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device; and add addresses of rows N−
1, N, and N+1 to a table stored in the memory device, wherein the table indicates which rows in the repair area should be used instead of rows N−
1, N, and N+1. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A memory device comprising:
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a memory array; a temporary storage area; and circuitry operative to; receive an address of row N in the memory array; determine whether the address of row N is present in a table stored in the memory device; if the address of row N is present in the table, remap the address to an address in a repair area of the memory device; if the address of row N is not present in the table; store, in the temporary storage area;
(i) first data to be stored in row N in the memory array (ii) second data, if any, stored in row N−
1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array;write the first data in row N in the memory array; and in response to an error in writing the first data in row N in the memory array; write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device; and add addresses of rows N−
1, N, and N+1 to the table,wherein the table indicates which rows in the repair area should be used instead of rows N−
1, N, and N+1. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification