POST LAST WIRING LEVEL INDUCTOR USING PATTERNED PLATE PROCESS
First Claim
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1. A semiconductor structure, comprising:
- a substrate having a metal wiring level within the substrate;
a capping layer on and above a top surface of the substrate;
an insulative layer on and above a top surface of the capping layer;
an inductor comprising a first portion in and above the insulative layer and a second portion in and above the insulative layer; and
a wire bond pad within the insulative layer, wherein the first portion the inductor has a height in a first direction greater than a height of the wire bond pad in the first direction, wherein the first direction is perpendicularly directed from the top surface of substrate toward the insulative layer.
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Abstract
A semiconductor structure. The semiconductor structure includes: a substrate having at least one metal wiring level within the substrate; an insulative layer on a surface of the substrate; an inductor within the insulative layer; and a wire bond pad within the insulative layer. The inductor and the wire bond pad are substantially co-planar. The inductor has a height greater than a height of the wire bond pad.
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Citations
12 Claims
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1. A semiconductor structure, comprising:
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a substrate having a metal wiring level within the substrate; a capping layer on and above a top surface of the substrate; an insulative layer on and above a top surface of the capping layer; an inductor comprising a first portion in and above the insulative layer and a second portion in and above the insulative layer; and a wire bond pad within the insulative layer, wherein the first portion the inductor has a height in a first direction greater than a height of the wire bond pad in the first direction, wherein the first direction is perpendicularly directed from the top surface of substrate toward the insulative layer. - View Dependent Claims (2, 3, 6, 7, 8, 9, 10, 11, 12)
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4-5. -5. (canceled)
Specification