Method And System For An Image Sensor Pipeline On A Mobile Imaging Device

• US 20080292219A1
• Filed: 11/14/2007
• Published: 11/27/2008
• Est. Priority Date: 05/24/2007
• Status: Abandoned Application

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Keall, Gary, Plowman, David
• Application Number:
  US11/939,956
• Publication Number:
  US 20080292219A1
• Time in Patent Office: Days
• US Class Current: 382/313
• CPC Class Codes: H04N 25/60 Noise processing, e.g. detecting, correcting, reducing or removing noise
• CPC Class Codes: H04N 25/61 the noise originating only from the lens unit, e.g. flare, shading, vignetting or "cos4"
• CPC Class Codes: H04N 25/68 applied to defects

Abstract

In an embodiment of the invention, images are processed within a mobile device. Image data may be divided into variable size tiles and processed in steps or stages on a per tile basis within a hardware image sensor pipeline. The processing steps or stages may comprise one or more distortion correction steps. A portion of the variable size tiles may be processed via software within a processor. In this regard, output from any portion of the ISP may be stored in RAM and subsequently retrieved for software processing. The results from software processing may be stored in RAM and communicated back to any point within the hardware ISP for additional processing. The hardware ISP and the processor via software may simultaneously process different portions of the variable size tiles.

Claims

1. A method for processing images, the method comprising:

dividing raw image data into a plurality of variable size tiles; and

processing each of said plurality of variable size tiles on a tile-by-tile basis via one or more of a plurality of steps and/or processes comprising distortion correction within a hardware image sensor pipeline (ISP) on a mobile device.

2. The method according to claim 1, comprising determining a size for one or more of said plurality of variable size tiles based on distortion within a corresponding local region of said raw image data.

3. The method according to claim 2, comprising processing a portion of said plurality of variable size tiles via software processing in a processor.

4. The method according to claim 3, comprising storing output from any portion of said image hardware sensor pipeline.

5. The method according to claim 4, comprising retrieving and processing said stored output via one or more software processes.

6. The method according to claim 5, comprising storing results from said processing via said one or more software processes.

7. The method according to claim 6, comprising communicating said stored results from said processing via said one or more software processes to any portion of said image hardware sensor pipeline for processing.

8. The method according to claim 7, comprising simultaneously processing a first portion of said plurality of said variable size tiles via a image sensor hardware pipeline and a second portion of said plurality of said variable size tiles via one or more software processes or steps.

9. A system for processing images, the system comprising:

one or more circuits that enable;

dividing raw image data into a plurality of variable size tiles; and

processing each of said plurality of variable size tiles on a tile-by-tile basis via one or more of a plurality of steps and/or processes comprising distortion correction within a hardware image sensor pipeline (ISP) on a mobile device.

10. The system according to claim 9, wherein said one or more circuits enables determination of a size for one or more of said plurality of variable size tiles based on distortion within a corresponding local region of said raw image data.

11. The system according to claim 10, wherein said one or more circuits enables processing of a portion of said plurality of variable size tiles via software processing in a processor.

12. The system according to claim 11, wherein said one or more circuits enables storage of output from any portion of said image hardware sensor pipeline.

13. The system according to claim 12, wherein said one or more circuits enables retrieval and processing of said stored output via one or more software processes.

14. The system according to Claim 13, wherein said one or more circuits enables storage of results from said processing via said one or more software processes.

15. The system according to claim 14, wherein said one or more circuits enables communication of said stored results from said processing via said one or more software processes to any portion of said image hardware sensor pipeline for processing.

16. The system according to claim 15, wherein said one or more circuits enables simultaneous processing of a first portion of said plurality of said variable size tiles via a image sensor hardware pipeline and a second portion of said plurality of said variable size tiles via one or more software processes or steps.

17. A machine-readable storage having stored thereon, a computer program having at least one code section for processing images, the at least one code section being executable by a machine for causing the machine to perform steps comprising:

dividing raw image data into a plurality of variable size tiles; and

processing each of said plurality of variable size tiles on a tile-by-tile basis via one or more of a plurality of steps and/or processes comprising distortion correction within a hardware image sensor pipeline (ISP) on a mobile device.

18. The machine-readable storage according to claim 17, wherein said at least one code section comprises code that enables determining a size for one or more of said plurality of variable size tiles based on distortion within a corresponding local region of said raw image data.

19. The machine-readable storage according to claim 18, wherein said at least one code section comprises code that enables processing a portion of said plurality of variable size tiles via software processing in a processor.

20. The machine-readable storage according to claim 19, wherein said at least one code section comprises code that enables storing output from any portion of said image hardware sensor pipeline.

21. The machine-readable storage according to claim 20, wherein said at least one code section comprises retrieving and processing said stored output via one or more software processes.

22. The machine-readable storage according to claim 21, wherein said at least one code section comprises code that enables storing results from said processing via said one or more software processes.

23. The machine-readable storage according to claim 22, wherein said at least one code section comprises code that enables communicating said stored results from said processing via said one or more software processes to any portion of said image hardware sensor pipeline for processing.

24. The machine-readable storage according to claim 23, wherein said at least one code section comprises code that enables simultaneously processing a first portion of said plurality of said variable size tiles via a image sensor hardware pipeline and a second portion of said plurality of said variable size tiles via one or more software processes or steps.