Stage yield prediction
First Claim
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1. A computer-implemented method comprising:
- receiving defectivity data identifying one or more defects associated with one or more previous wafer designs;
dividing the defects associated with one or more design elements of the previous wafer designs into systematic defects and random defects;
for each design layout of a new wafer design, predicting a yield separately for the systematic defects and the random defects; and
calculating a combined yield based on the yield predicted for the systematic defects and the yield predicted for the random defects.
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Abstract
In one embodiment, a method for predicting yield during the design stage includes receiving defectivity data identifying defects associated with previous wafer designs, and dividing the defects into systematic defects and random defects. For each design layout of a new wafer design, yield is predicted separately for the systematic defects and the random defects. A combined yield is then calculated based on the yield predicted for the systematic defects and the yield predicted for the random defects.
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Citations
21 Claims
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1. A computer-implemented method comprising:
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receiving defectivity data identifying one or more defects associated with one or more previous wafer designs; dividing the defects associated with one or more design elements of the previous wafer designs into systematic defects and random defects; for each design layout of a new wafer design, predicting a yield separately for the systematic defects and the random defects; and calculating a combined yield based on the yield predicted for the systematic defects and the yield predicted for the random defects. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer-implemented system comprising:
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a design data database, to store design data for wafer designs, wherein the design data comprises at least one of;
design layouts, and routing information for the wafer design layouts;an inspection and metrology data database, to store defectivity information associated with the previous designs; and a design-stage yield analyzer, coupled to the design data database and inspection and metrology data database, to identify wafer designs, to identify defects on the wafer designs, and to predict yield for each wafer design. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A computer-implemented apparatus comprising:
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means for receiving defectivity data identifying one or more defects associated with one or more previous wafer designs; means for dividing the defects associated with one or more design elements of the previous wafer designs into systematic defects and random defects; for each design layout of a new wafer design, means for predicting a yield separately for the systematic defects and the random defects; and means for calculating a combined yield based on the yield predicted for the systematic defects and the yield predicted for the random defects.
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19. A computer readable storage medium, comprising executable instructions which when executed on a processing system cause the processing system to perform a method comprising:
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receiving defectivity data identifying one or more defects associated with one or more previous wafer designs; dividing the defects associated with one or more design elements of the previous wafer designs into systematic defects and random defects; for each design layout of a new wafer design, predicting a yield separately for the systematic defects and the random defects; and calculating a combined yield based on the yield predicted for the systematic defects and the yield predicted for the random defects. - View Dependent Claims (20, 21)
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Specification