III-V Nitride Semiconductor Layer-Bonded Substrate and Semiconductor Device

• US 20080296584A1
• Filed: 05/21/2008
• Published: 12/04/2008
• Est. Priority Date: 05/30/2007
• Status: Abandoned Application

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Hachigo, Akihiro
• Application Number:
  US12/124,161
• Publication Number:
  US 20080296584A1
• Time in Patent Office: Days
• US Class Current: 257/76
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

Affords III-V nitride semiconductor layer-bonded substrates from which semiconductor device of enhanced properties can be manufactured, and semiconductor devices incorporating the III-V nitride semiconductor layer-bonded substrates. The III-V nitride semiconductor layer-bonded substrate, in which a III-V nitride semiconductor layer and a base substrate are bonded together, is characterized in that thermal expansion coefficient difference between the III-V nitride semiconductor layer and the base substrate is 4.5×10⁻⁶ K⁻¹ or less, and in that the thermal conductivity of the base substrate is 50 W·m⁻¹·K⁻¹ or more.

Claims

1. A III-V nitride semiconductor layer-bonded substrate in which a III-V nitride semiconductor layer and a base substrate are bonded together, characterized in that:

the difference in coefficient of thermal expansion between the III-V nitride semiconductor layer and the base substrate is 4.5×

10<sup>−

6</sup> K<sup>−

1</sup> or less; and

the thermal conductivity of the base substrate is 50 W·

m<sup>−

1</sup>·

K<sup>−

1</sup> or more.

2. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 1, wherein the III-V nitride semiconductor layer is GaN layer.

3. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 1, wherein the resistivity of the base substrate is 10 Ω

·

cm or less.

4. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 2, wherein the resistivity of the base substrate is 10 Ω

·

cm or less.

5. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 1, wherein the principal component of the base substrate is a metal including at least whichever of Mo, W, or Ir.

6. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 2, wherein the principal component of the base substrate is a metal including at least whichever of Mo, W, or Ir.

7. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 1, wherein the principal component of the base substrate is at least whichever of AlN, Si, or SiC.

8. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 2, wherein the principal component of the base substrate is at least whichever of AlN, Si, or SiC.

9. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 1, wherein the thermal conductivity of the base substrate equals or exceeds the thermal conductivity of the III-V nitride semiconductor layer.

10. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 2, wherein the thermal conductivity of the base substrate equals or exceeds the thermal conductivity of the III-V nitride semiconductor layer.

11. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 9, wherein the base substrate includes one material selected from the group consisting of Cu—

Mo alloys, Cu—

W alloys, Al—

SiC composite materials, diamond, and diamond-metal composite materials.

12. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 10, wherein the base substrate includes one material selected from the group consisting of Cu—

Mo alloys, Cu—

W alloys, Al—

SiC composite materials, diamond, and diamond-metal composite materials.

13. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 1, wherein a plurality of layers are laminated in the base substrate.

14. A III-V nitride semiconductor layer-bonded substrate as set forth in claim 2, wherein a plurality of layers are laminated in the base substrate.

15. A semiconductor device having an at least single-lamina III-V nitride semiconductor epitaxial layer formed on a III-V nitride semiconductor layer-bonded substrate as set forth in claim 1.

16. A semiconductor device having an at least single-lamina III-V nitride semiconductor epitaxial layer formed on a III-V nitride semiconductor layer-bonded substrate as set forth in claim 2.